Julien Delalleau

Energy consumption optimization in nonvolatile silicon nanocrystal memories

In this paper we investigate the energy consumption of Discrete-Trap Silicon Nanocrystal (Si-nc) Nonvolatile Memory Cell during Channel Hot Electron programming operation. We compare this cell with a Floating Gate Flash in order to evaluate the current absorption and the energy consumption under different conditions. Using a commercial TCAD simulator, a good agreement between data and simulations is obtained and the involved mechanisms are analysed. Then we propose a solution to optimize the programming window and energy consumption trade-off for Si-nc Flash Cells.

A new non-volatile memory cell based on the flash architecture for embedded low energy applications: ATW (Asymmetrical Tunnel Window)

In this paper we propose a new non-volatile charge trap memory architecture implemented on 200mm wafer in 90nm technology node. The aim of this work is to investigate an alternative and scalable solution for embedded low energy applications. The Asymmetrical Tunnel Window (ATW) memory cell has been developed in order to improve the programming operation during a hot carrier injection. The main property of this device is the presence of an asymmetrical tunnel oxide thickness along the channel. This characteristics enables an improvement in terms of current consumption and injection efficiency with respect to the standard Flash floating gate memory cell. In this work we describe the fabrication process of ATW memory cell and, using a commercial TCAD simulator and experimental results, we demonstrate the good functioning of our device thanks to the increased control gate/floating gate (CG/FG) coupling factor. To conclude we confirm the reliability performances with the endurance experiments up to 100k cycles.

Optimization of the ATW Non-Volatile Memory for Connected Smart Objects

The development of new wireless devices is growing up, driven by the market of connected things for many applications: communications, cloud and health. In this scenario the current consumption of memory devices plays a key role. To save the battery of these devices, we need to develop the components that consume less and less. In this paper we propose to improve the performances of an original architecture of nonvolatile memory cell: the Asymmetrical Tunnel Window (ATW) cell. We compare here the standard Flash floating gate memory cell with the new proposed device, with an accurate experimental investigation of programming window and energy consumption. Moreover we optimized the ATW cell architecture by modifying the ratio of oxides lengths and thicknesses. Finally, we experimentally demonstrate an improvement of 4 times on the programming efficiency with respect the standard memory.

Dynamic behavior of silicon nanocrystal memories during the hot carrier injection

In this paper we present the last improvement on programming window and consumption of silicon nanocrystal memory cell (Si-nc). Using a dynamic technique to measure the drain current during the hot carrier injection (HCI) programming operation, we explain the behavior of Flash floating gate (F.G.) and silicon nanocrystal memories. We use TCAD simulations to reproduce the charge diffusion in the nanocrystal trapping layer in order to understand the physical mechanism. Finally experimental results of electrical characterizations are shown using different bias conditions to compare the devices.