Junqing Guan

Design of Concurrent Multiband Doherty Power Amplifiers for Wireless Applications

This paper presents the design of concurrent multiband Doherty power amplifiers (MB-DPA) based on a newly developed multiband impedance inverter network (MB-IIN). The design concept can theoretically be applied to a large number of frequency bands. To support the design of MB-DPAs, a detailed realization of the MB-IIN is introduced for the first time. For verifying the proposed MB-IIN design technique, tri-band and quad-band DPAs for 950, 1500, 2140, and 2650 MHz are designed, implemented, and characterized. Measurement results show good performance in terms of efficiency, linearity, and especially the pronounced Doherty behavior in all targeted bands, demonstrating the prospective applications of the developed MB-IIN in the design of concurrent multiband Doherty power amplifiers for wireless communications.

Lowpass delta-sigma modulator with digital upconversion for switching-mode power amplifiers

This work presents a lowpass ΔΣ based transmitter frontend suitable for software defined radios (SDRs). ΔΣ modulation is utilised to generate an RF signal suitable for driving highly efficient switching-mode power amplifiers. The whole transmitter frontend is implemented in the digital domain up to the upconversion. Thus, high reconfigurability and flexibility necessary for SDR is achieved. This work presents two implementations methods for lowpass ΔΣ modulator based transmitter frontends for SDR applications. The circuit design in a 90nm CMOS process and a discrete implementation utilising a field programmable gate array (FPGA) are discussed. Feasibility of the concept is demonstrated by simulation for the integrated implementation and by measurements for the FPGA solution.

System-level performance study of a multistandard outphasing transmitter using optimised multilevels

This paper analyses an energy-efficient multimode and multistandard LINC transmitter. This architecture is based on controlling the output power of highly efficient power amplifiers. Compared with the classical LINC, an multilevel selection algorithm is developed to optimise the levels depedent on the signal statistics in order to boost average power efficiency. Based on this algorithm, a multilevel LINC transmitter is implemented on a system-level. The architecture can be configured for different standards, such as EDGE, WCDMA and LTE. Models and algorithm are developed in SystemC and Matlab for the exploration of design specification and verification of the complete system. Simulation results show that compared with the classical LINC, average power added efficiency is improved from 10.5 % to 29.26 % for an uplink LTE signal with a peak-to-average power ratio of 6 dB. Futhermore, compared with equal-distance multilevel LINC systems, an efficiency boosting between 6 % and 0.5 % points can also be achieved for 2 to 8 multilevels.

Broadband Sequential Power Amplifier With Doherty-Type Active Load Modulation

This paper presents the concept and the detailed analysis of a sequential power amplifier with Doherty-type active load modulation (SPA-D). By introducing a Doherty-type output combiner into the conventional sequential power amplifier (PA), highly efficient amplification over broadband and wide dynamic range for the reconfigurable output power back-off can be achieved. The proposed amplifier mimics both the sequential and the Doherty PAs by exploiting the active load modulation region that has not been considered in the design of Doherty amplifiers. A broadband SPA-D prototype having 8-dB output back-off power (OBO) is designed and implemented. The experimental results exhibit drain efficiencies of 50%-75% at 7-10-dB OBO and 57%-70% at peak power with Doherty-like behavior over 700-MHz bandwidth centered at 2.35 GHz. The ability to easily reconfigure the breakpoint is experimentally verified, providing a convenient means for optimizing the amplifier efficiency according to various wireless standards. In addition, by using a memoryless digital predistortion, the spectrum emission mask required for long-term evolution down link can be fulfilled, making it well suited for applications in modern wireless transmitters.

Design of a broadband three-way sequential Doherty power amplifier for modern wireless communications

This paper presents the design and implementation of a broadband 3-way sequential-based Doherty power amplifier (DPA). This design approach can also be extended for a broadband N-way DPA architecture. A 12 - 23.5 W 3-way DPA has been designed, implemented and characterised to verify the proposed technique. The measured drain efficiency of 55 - 69 % over 500 MHz at 12 - 14 dB output power backoff (OBO) and 60 - 75 % over 600 MHz at saturation is achieved. Single-tone measurement at 2.1 GHz exhibits a drain efficiency of 63 %, 62.5 % and 75 % at 13.6 dB, 6 dB and 0 dB OBO, respectively. Also at this frequency, linearised measurement with a 10 MHz-LTE signal having a crest factor of 8.2 dB shows an average drain efficiency of 59 % and adjacent channel leakage ratio (ACLR) better than -45.5/ - 45.7 dBc at an average output power of 34.5 dBm. To the best knowledge of the authors, this is the first broadband 3-way sequential Doherty power amplifier with such high performance reported so far.

Improvement on linearity with iterative calibration technique for multilevel LINC transmitters

This paper proposes an iterative calibration technique to enhance the linearity for multilevel LINC transmitters. With this approach, the precision of characterising AM/AM and AM/PM behaviours for discrete levels can be improved, which results in better adjacent channel leakage ratio (ACLR) and error vector magnitude (EVM) performance. An ML-LINC transmitter is built with two PAs in GaN technology, which delivers 40.8 dBm output power with 68% drain efficiency at 2.05 GHz. Up to 5 dB ACLR improvement can be observed by iterative calibration using S1/S2 for a 5 MHz LTE signals. The configuration with 16 levels can give satisfying linearity performance to meet the standard specification, while keep the complexity reasonable. Measurement results show an ACLR of -46 dBc, EVM of 1.9% (QPSK) and 4.2% (64-QAM) at average output power of 35.7 dBm with 51.1% drain efficiency for a 10 MHz LTE signals with a PAPR of 7.9 dB. The performance of the built ML-LINC tranmitter is compared to the state-of-the-art. Both the linearity and drain efficiency are quite competitive.

Achieving linearity for outphasing amplifiers targeting LTE applications and beyond

This paper analyses the impact of the level locations in a multilevel LINC transmitter on the obtainable linearity performance. Results show that by placing levels in the upper dynamic region of outphased signals, a linearity performance suitable for LTE applications and beyond can be achieved. A multilevel LINC transmitter with 5 levels is implemented using 10 W GaN CREE devices at 1.9 GHz. A 10 dB PAPR 1.4 MHz LTE signal is decomposed for outphasing and recombined to achieve an ACPR performance of -50 dBc while delivering 2 W average output power.

Impact of the number of levels on the performance of multilevel LINC transmitters

This paper analyses an energy-efficient multilevel LINC transmitter with low complexity. Compared with a conventional multilevel LINC using a supply modulator, a new architecture to realise multiple levels is analysed. With this architecture, distortion caused by delay mismatch and memory effects caused by the limited bandwidth of PAs can be mitigated resulting in improved out-of-band emissions. A system analysis shows the improvement of performance regarding efficiency, spectrum and ACLR in presence of delay mismatch and system bandwidth limitations. The analysis at system level is verified by measurements complying with 3GPP LTE specification. An improvement of 17 dB in out-of-band emission is observed by increasing the number of levels from 1 to 40. Meanwhile, average efficiency is also increased from 12 % to 42 %.

Analysis of design specification for digital polar RF transmitter at system and architectural level

The polar transmitter is an alternative RF transmitter architecture solution for highly efficient amplification of nonconstant envelope signals. This paper presents an analysis of system performance of digital polar RF transmitters. The approach is to analyse the relation between error vector magnitude (EVM) and output power spectrum density (PSD). The requirements on amplitude dynamic range, bit resolution and time delay mismatch for AM/PM paths are studied and used to specify the design of digital polar RF transmitters. All the components in the digital polar RF transmitter have been modelled both in Matlab and SystemC. The analysis and simulation can be completed within seconds. Based upon the presented analysis results, optimum design parameters for the components and system can be easily derived. With the analysed specification, the performance of the polar transmitter regarding EVM and PSD is verified at the system level as well.

Impact of modulation order and DAC resolution on high data rate wireless transmitters

Although the speed of a digital-to-analog converter (DAC) can reach 100GS/s in recent studies, the achievable effective number of bit (ENOB) is still significantly low. The low ENOB limits the high speed DAC application in high-data-rate transmitters. This paper analyses the required DAC resolution for different modulation orders, which is determined by error vector magnitude (EVM). To verify the output, a high-data-rate quadrature-amplitude-modulation (QAM) transmitter is modeled. Each block is modeled in Verilog/Verilog AMS. According to the model, a data-rate of 20 Gb/s transmitter with 16-QAM and 7 bit DAC is simulated. Even if taken phase error of 5 degree and gain mismatch of 1.3 dB into account, the model works properly. Adjacent channel leakage ratio (ACLR), at 1-dB compression point of 35 dBm, reduced from -29.5 dBc to -23.3 dBc.