Kazumi Iwadate

An Electron Beam Nanolithography System and its Application to Si Nanofabrication

We present an electron beam nanolithography system which features sub-10-nm beam size over a large 480×480 µ m2 field and a high 70 kV acceleration voltage with a Zr/O/W thermal field emitter tip. A beam can be deflected at 100 MHz in 2-nm steps, which allows the use of highly sensitive resist. The system is equipped with a highly sensitive YAG detector for electrons backscattered from a registration mark as well as a C/W multilayer knife edge for beam size measurement and focusing. These techniques achieve a beam size of about 6 nm. A 10-nm-scale resist pattern was obtained using ZEP520 resist with this system. Furthermore, Si nanostructures have been obtained by using an image reversal process with ECR plasma oxidation. Photoluminescence was observed from the Si nanowires fabricated with this system.

Metrology of Atomic Force Microscopy for Si Nano-Structures

A new, practical metrological method for atomic force microscopy (AFM) is proposed to determine the dimensions of Si nano-structures. In this method, the AFM image profile is expressed as a modeling equation which includes the critical dimensions of the sample and the tip. The dimensions are obtained from part of the measured AFM image as fitting parameters of the equation. It is demonstrated that the critical dimensions of the sample and the tip obtained by this method agree well with those measured by scanning electron microscopy in the nanometer range.

Nano-scale fluctuations in electron beam resist pattern evaluated by atomic force microscopy

Abstract The resist pattern fluctuations on the nano-scale are successfully observed using a dynamic force mode AFM. A scaling analysis based on the fractals applies to the AFM images for quantitative evaluation of the fluctuations. The standard deviation of width fluctuations in a ZEP resist pattern is 2.8 nm. The scaling analysis confirms that the surface morphology of the pattern sidewall is almost the same as that of the resist film lightly exposed by an electron beam. The main cause of the fluctuation is structures with a diameter of 20–30 nm which are composed of large groups of molecules.

10-nm silicon lines fabricated in (110) silicon

A technique which satisfies both high resolution and minimum linewidth fluctuation has been developed for fabrication of nanometer-scale Si structures. The technique is based on the development of resist with hexyl acetate and the anisotropic etching of Si with KOH. The combination of ZEP-520 resist and hexyl acetate developer is effective to improve the resolution and reduce pattern fluctuation in e-beam lithography. Resist lines less than 20 nm wide with a fluctuation less than 3 nm are obtained. When these lines, aligned in the direction on a (110) Si wafer by using the fan-pattern method, are transferred to Si by KOH etching, linewidth fluctuation is reduced further because the (111) planes from the sidewalls. In addition, a feature size as small as 7 nm can be formed by additional etching using alcohol-added KOH solution.

Transport properties of silicon nanostructures fabricated on SIMOX subtrates

Abstract Si quantum wires and Si single electron transistors were fabricated successfully by combination of SIMOX, e-beam lithography and thermal oxidation. In particular, pattern-dependent oxidation peculiar to a thin SIMOX-Si layer was utilized to the full extent for forming the tunnel capacitors of a single electron transistor. Owing to its ultra-small structure, a Si quantum wire 17 nm wide, 5 nm high and 60 nm long showed quantized conductance even at temperatures above 100 K. For a Si single electron transistor whose total capacitance was reduced to as small as 2 aF, conductance oscillation due to the Coulomb blockade effect persisted up to room temperature.

Quantized Conductance of a Silicon Wire Fabricated by Separation-by-Implanted-Oxygen Technology

Ultra-fine silicon wires have been fabricated by SIMOX (Separation by IMplanted OXygen) technology, electron beam lithography, anisotropic chemical etching, and thermal oxidation. The silicon wires have a trapezoidal cross-sectional shape and are fully surrounded by SiO 2 , as confirmed by transmission electron microscopy. The size of the wires is controlled by using the fabrication method proposed here, as measured by scanning electron microscopy. A wire 20 nm wide and 6 nm high exhibits quantized conductance at 26 K, and conductance steps remain up to 60 K. In the case of a wire 17 nm wide and 4 nm high, steplike structures in the conductance versus gate voltage curve persist over 100 K. These results are attributed to the large subband energy spacing in the narrow wire region, where electrons are physically confined by the high potential of the SiO 2 barrier

Temperature Dependence of the Phase Coherence Length of High-Mobility AlGaAs/GaAs Quantum-Wire Rings

The temperature dependence of the phase coherence length, L, of high-mobility AlGaAs/GaAs quantum-wire rings was investigated through the Aharonov-Bohm (AB) magnetoresistance oscillations. The expression of the AB oscillation amplitude for the quasiballistic, multitransverse-mode quantum-wire rings was derived and used to extract L from the experimental AB oscillation amplitudes. The phase coherence time, τ, was estimated from L using an expression for an intermediated region. It was found that below 2.0 K, L saturates at 2.5 µm and τ saturates at 24 ps. The temperature dependence of τ showed approximately T-2 dependence above 2.0 K, which is characteristic of electron-electron scattering in a pure system.

Quantized Conductance of a Silicon Wire Fabricated Using SIMOX Technology

An ultra-fine silicon wire has been fabricated using the SIMOX (Separation by IMplanted OXygen) technology, electron beam lithography, anisotropic chemical etching, and thermal oxidation. The wire exhibits quantized conductance at 26K, while conductance plateaus remain up to 60 K. This is attributed to the large subband energy spacing in a naffow constriction successfully formed by using physical confinement with a high potential SiO2 barrier. A-4-1

Direct Electron Beam Data Writing Technology for 128K EB-ROM

A 128 K-bit MOS read-only memory has been developed using direct electron beam data writing technology. The technology has been applied, using 1) scanning electron beam exposure system with high registration accuracy, 2) advanced wafer processes to fit the EB lithography, and 3) highly sensitive positive resist, FPM. Programming of information in the ROM is accomplished by modifying threshold voltage of transistors, where field oxide is used as a gate oxide in place of thin gate oxide. Through the present EB lithography, the alignment accuracy of ±0.15 µm and the resist pattern size accuracy of ±0.15 µm are obtained. The cell size and chip size of the ROM are 8 µm ×7.75 µm and 3.75 mm ×5.5 mm, respectively. The fabricated EB-ROM is capable fo 200 ns access time and 65 mW power dissipation for a single supply voltage of 5 V and is loaded with Chinese character patterns.

Photoluminescence from oxidized silicon nano-lines

Abstract PL is measured for Si lines formed on (110) SIMOX wafers by e-beam lithography, KOH etching and oxidation. Clear PL can be observed for such oxidized Si lines. The peak position is at a wavelength of 760 nm and is independent of the Si width. This means the origin of emission is not in the Si core but at the Si SiO 2 interface, just as it is for oxidized porous Si. In addition, the Si thickness yielding a maximum intensity is about 5 nm in the middle of the Si lines, in contrast to about 1 nm in Si films. The difference is possibly caused by stress generated due to patterning and oxidation. Therefore, the amount of stress in an oxidized Si structure is an important factor that should be considered when evaluating the PL.