Ke Wen

Software-defined optical network for metro-scale geographically distributed data centers.

The emergence of cloud computing and big data has rapidly increased the deployment of small and mid-sized data centers. Enterprises and cloud providers require an agile network among these data centers to empower application reliability and flexible scalability. We present a software-defined inter data center network to enable on-demand scale out of data centers on a metro-scale optical network. The architecture consists of a combined space/wavelength switching platform and a Software-Defined Networking (SDN) control plane equipped with a wavelength and routing assignment module. It enables establishing transparent and bandwidth-selective connections from L2/L3 switches, on-demand. The architecture is evaluated in a testbed consisting of 3 data centers, 5-25 km apart. We successfully demonstrated end-to-end bulk data transfer and Virtual Machine (VM) migrations across data centers with less than 100 ms connection setup time and close to full link capacity utilization.

Programmable Dynamically-Controlled Silicon Photonic Switch Fabric

Dynamically-controlled optical switches can enable novel functionalities in future high-performance computing and data center systems, including resource allocation and real-time routing. These capabilities can improve system robustness, performance, as well as overall power consumption. Silicon (Si) photonic switch fabrics are capable of nanosecond-scale switching, thus making them potentially attractive for dynamic reconfiguration at data packet rates, which are typically in the GHz range and are made via CMOS-compatible processes for smooth process integration. In this paper, we explore the dynamic control of data signals through an Si photonic switch matrix and demonstrate a programming interface for configuring the switch. Our associated control algorithm is shown to provide the capability for dynamically reallocating the optical power through multicasting for robust operation in case the optical loss changes along a given path. The scheme is shown to operate error-free with 40 Gb/s line rate data streams in a 4×4 Si photonic switch fabric.

Flexfly: enabling a reconfigurable dragonfly through silicon photonics

The Dragonfly topology provides low-diameter connectivity for high-performance computing with all-to-all global links at the inter-group level. Our traffic matrix characterization of various scientific applications shows consistent mismatch between the imbalanced group-to-group traffic and the uniform global bandwidth allocation of Dragonfly. Though adaptive routing has been proposed to utilize bandwidth of non-minimal paths, increased hops and cross-group interference lower efficiency. This work presents a photonic architecture, Flexfly, which “trades” global links among groups using low-radix Silicon photonic switches. With transparent optical switching, Flexfly reconfigures the inter-group topology based on traffic pattern, stealing additional direct bandwidth for communication-intensive group pairs. Simulations with applications such as GTC, Nekbone and LULESH show up to 1.8× speedup over Dragonfly paired with UGAL routing, along with halved hop count and latency for cross-group messages. We built a 32-node Flexfly prototype using a Silicon photonic switch connecting four groups and demonstrated 820 ns interconnect reconfiguration time.

Optical interconnects for extreme scale computing systems

Face-to-face comparison of major large scale HPC interconnects.Review of challenges and solutions for increased use of optics in HPC.Description of optical switching, in terms of principle, limitations, technical requirements and benefits. Large-scale high performance computing is permeating nearly every corner of modern applications spanning from scientific research and business operations, to medical diagnostics, and national security. All these communities rely on computer systems to process vast volumes of data quickly and efficiently, yet progress toward increased computing power has experienced a slowdown in the last number of years. The sheer cost and scale, stemming from the need for extreme parallelism, are among the reasons behind this stall. In particular, very large-scale, ultra-high bandwidth interconnects, essential for maintaining computation performance, represent an increasing portion of the total cost budget.Photonic systems are often cited as ways to break through the energy-bandwidth limitations of conventional electrical wires toward drastically improving interconnect performance. This paper presents an overview of the challenges associated with large-scale interconnects, and reviews how photonic technologies can contribute to addressing these challenges. We review some important aspects of photonics that should not be underestimated in order to truly reap the benefits of cost and power reduction.

PhoenixSim: Crosslayer Design and Modeling of Silicon Photonic Interconnects

Silicon Photonics is emerging as a key technology for high-performance computing interconnects. Yet few tools are available to investigate how to best leverage this technology in current or future computer architectures and, furthermore, how this technology will impact real application workloads. In this paper, we present a multi-layer simulation and modeling software solution -- PhoenixSim. PhoenixSim enables integrated and interactive design space exploration over the physical, networking and application layers. In this paper, we report its general organization and constituting models. We show how the different layers of the tool can be utilized to design and analyze an optical interconnect network for supporting the HPCG (High Performance Conjugate Gradient) benchmark.

A software-defined optical gateway for converged inter/intra data center networks

We present a software-defined optical gateway for converged inter/intra data center networks. The optical gateway enables transparent rack-to-rack connectivity across data centers through WDM channels. Sub-second reconfiguration time and wavelength defragmentation are experimentally demonstrated.

Reducing energy per delivered bit in silicon photonic interconnection networks

A novel interface design with an optically-implemented availability feedback protocol is proposed for silicon photonic networks. Simulation results show a reduction in energy per delivered bit by as much as 34% compared to prior schemes.

Silicon photonic memory interconnect for many-core architectures

A scalable and flexible memory interconnect is a key component for a many-core architecture to take full advantage of the high-bandwidth of multiple memory stacks. In this paper, we discuss both technological and architectural challenges of these processor-to-memory interconnects, and focus on two important issues of many-core memory accesses: traffic hotspots and non-uniform memory access (NUMA). We propose a reconfigurable Silicon photonic memory interconnect based on 2.5D stacking that can direct memory traffic to any memory interface on the processor, thus alleviating the two aforementioned effects in addition to providing high bandwidth. Simulations based on a 16-core 4-memory model show that the proposed architecture can lead to up to 2× STREAM speedup over fixed connections in both hotspot and NUMA scenarios. We also demonstrate the proposed architecture using a four-port Silicon photonic demultiplexer and a 4×4 synthesizable on-chip fabric called OpenSoC. The FPGA-emulated system demonstrates dynamic memory rewiring through wavelength routing, and achieves a reconfiguration time of 5 microseconds.

Hardware–Software Integrated Silicon Photonics for Computing Systems

A wealth of high-bandwidth and energy-efficient silicon photonic devices have been demonstrated in recent years. These represent promising solutions for high-performance computer systems that need to distribute extremely large amounts of data in an energy-efficient manner. Chip-scale optical interconnects that employ novel silicon photonics devices can potentially leapfrog the performance of traditional electronic-interconnected systems. However, the benefits of silicon photonics at a system level have yet to be realized. This chapter reviews methodologies for integrating silicon photonic interconnect technologies with computing systems, including implementation challenges associated with device characteristics. A fully functional co-integrated hardware–software system needs to encompass device functionality, control schema, and software logic seamlessly. Each layer, ranging from individual device characterization, to higher layer control of multiple devices, to arbitration of networks of devices, and ultimately to encapsulation of subsystems to create the entire computing system is explored. Finally, results and implications at each level of the system stack are presented.

Experimental demonstration of converged inter/intra data center network architecture

We present a novel converged inter/intra data center network architecture to enable on-demand rack-to-rack connectivity across data centers. The hardware architecture includes a bidirectional software-defined optical gateway that aggregates racks or pods on a conventional data center data plane and provides both east-west and north-south connectivity. The software architecture consist of two Software-Defined Networking (SDN) agents over the data center and transport network control planes that manages connection requests and finds the optimal routing and wavelength configuration from the available WDM channels. We present bulk data transfer and Virtual Machine (VM) migration on a testbed of three data centers.