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Dive into the research topics where Keiji Tanouchi is active.

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Featured researches published by Keiji Tanouchi.


Proceedings of SPIE | 2012

Pattern scaling with directed self assembly through lithography and etch process integration

Benjamen M. Rathsack; Mark Somervell; Josh Hooge; Makoto Muramatsu; Keiji Tanouchi; Takahiro Kitano; Eiichi Nishimura; Koichi Yatsuda; Seiji Nagahara; Iwaki Hiroyuki; Keiji Akai; Takashi Hayakawa

Directed self-assembly (DSA) has the potential to extend scaling for both line/space and hole patterns. DSA has shown the capability for pitch reduction (multiplication), hole shrinks, CD self-healing as well as a pathway towards line edge roughness (LER) and pattern collapse improvement [1-4]. The current challenges for industry adoption are materials maturity, practical process integration, hardware capability, defect reduction and design integration. Tokyo Electron (TEL) has created close collaborations with customers, consortia and material suppliers to address these challenges with the long term goal of robust manufacturability. This paper provides a wide range of DSA demonstrations to accommodate different device applications. In collaboration with IMEC, directed line/space patterns at 12.5 and 14 nm HP are demonstrated with PS-b-PMMA (poly(styrene-b-methylmethacrylate)) using both chemo and grapho-epitaxy process flows. Pre-pattern exposure latitudes of >25% (max) have been demonstrated with 4X directed self-assembly on 300 mm wafers for both the lift off and etch guide chemo-epitaxy process flows. Within TELs Technology Development Center (TDC), directed selfassembly processes have been applied to holes for both CD shrink and variation reduction. Using a PS-b-PMMA hole shrink process, negative tone developed pre-pattern holes are reduced to below 30 nm with critical dimension uniformity (CDU) of 0.9 nm (3s) and contact edge roughness (CER) of 0.8 nm. To generate higher resolution beyond a PS-b-PMMA system, a high chi material is used to demonstrate 9 nm HP line/ space post-etch patterns. In this paper, TEL presents process solutions for both line/space and hole DSA process integrations.


Proceedings of SPIE | 2013

Advances in directed self assembly integration and manufacturability at 300 mm

Benjamen M. Rathsack; Mark Somervell; Makato Muramatsu; Keiji Tanouchi; Takahiro Kitano; Eiichi Nishimura; Koichi Yatsuda; Seiji Nagahara; Hiroyuki Iwaki; Keiji Akai; Mariko Ozawa; Ainhoa Romo Negreira; Shigeru Tahara; Kathleen Nafus

Directed self-assembly (DSA) has the potential to extend scaling for both line/space and hole patterns. DSA has shown the capability for pitch reduction (multiplication), hole shrinks, CD self-healing as well as a pathway towards LWR and pattern collapse improvement [1-10]. TEL has developed a DSA development ecosystem (collaboration with customers, consortia, inspection vendors and material suppliers) to successfully demonstrate directed PS-PMMA DSA patterns using chemo-epitaxy (lift-off and etch guide) and grapho-epitaxy integrations on 300 mm wafers. New processes are being developed to simplify process integration, to reduce defects and to address design integration challenges with the long term goal of robust manufacturability. For hole DSA applications, a wet development process has been developed that enables traditional post-develop metrology through the high selectivity removal of PMMA cylindrical cores. For line/ space DSA applications, new track, cleans and etch processes have been developed to improve manufacturability. In collaboration with universities and consortia, fundamental process studies and simulations are used to drive process improvement and defect investigation. To extend DSA resolution beyond a PS-PMMA system, high chi materials and processes are also explored. In this paper, TEL’s latest process solutions for both hole and line/space DSA process integrations are presented.


Archive | 2013

PATTERN FORMING METHOD, PATTERN FORMING APPARATUS, AND COMPUTER READABLE STORAGE MEDIUM

Makoto Muramatsu; Takahiro Kitano; Tadatoshi Tomita; Keiji Tanouchi


Archive | 2013

PATTERN FORMING METHOD, PATTERN FORMING APPARATUS, AND NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM

Makoto Muramatsu; Takahiro Kitano; Tadatoshi Tomita; Keiji Tanouchi


Archive | 2015

SUBSTRATE CLEANING METHOD, SUBSTRATE CLEANING SYSTEM, AND MEMORY MEDIUM

Miyako Kaneko; Keiji Tanouchi; Takehiko Orii; Itaru Kanno; Meitoku Aibara; Satoru Tanaka


Archive | 2017

SUBSTRATE TREATMENT METHOD, COMPUTER READABLE STORAGE MEDIUM AND SUBSTRATE TREATMENT SYSTEM

Makoto Muramatsu; Takahiro Kitano; Tadatoshi Tomita; Keiji Tanouchi; Kazutoshi Yano; Kenichi Shigetomi; Akihiro Toyozawa


Archive | 2015

Substrate cleaning method, substrate cleaning system

Satoru Tanaka; Takehiko Orii; Meitoku Aibara; Miyako Kaneko; Keiji Tanouchi; Itaru Kanno


Archive | 2015

Substrate processing method, computer storage medium and substrate processing system

Makoto Muramatsu; 村松 誠; Takahiro Kitano; 北野 高広; Tadatoshi Tomita; 忠利 冨田; Keiji Tanouchi; 啓士 田内


Archive | 2013

パターン形成方法、パターン形成装置、及び非一時的なコンピュータ読み取り可能な記憶媒体

Makoto Muramatsu; 村松 誠; Takahiro Kitano; 北野 高広; Tadatoshi Tomita; 忠利 冨田; Keiji Tanouchi; 啓士 田内


Archive | 2013

Pattern forming method and heating apparatus

Makoto Muramatsu; Takahiro Kitano; Tadatoshi Tomita; Keiji Tanouchi

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