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Featured researches published by Kinya Mitsumoto.


symposium on vlsi circuits | 1994

Circuit Techniques For An 8-ns Ecl 100K Compatible 3.3v 16mb Bicmos Sram With Minimum Operation Voltage Of 2.3v

Takashi Akioka; Seigoh Yukutake; Kenichi Fukui; Kinya Mitsumoto; Atsushi Hiraishi; Kaoru Nakagawa; Noboru Akiyama; Masahiro Iwamura; Yutaka Kobayashi; Shuji Ikeda; Hideaki Uchida

We describe new circuit techniques for an 8-11s ECL compatible 16Mb BiCMOS SRAM. This is the first reported implementation of ECL lOOK U0 compatibility with an operation voltage of less than 3.0V. We developed an ECL reference circuit that operates with a 2.3V supply voltage. A novel hierarchically divided common-emitter sense circuit reduces the delay due to long data lines to achieve a simulated address access time of 8ns under typical operating conditions.


Archive | 1987

Memory device with improved common data line bias arrangement

Kinya Mitsumoto; Shinji Nakazato; Yoshiaki Yazawa; Masanori Odaka; Hideaki Uchida; Nobuaki Miyakawa


Archive | 1994

Reference current generating circuit for generating a constant current

Takashi Akioka; Kinya Mitsumoto; Yutaka Kobayashi


Archive | 1997

Semiconductor device capable of holding signals independent of the pulse width of an external clock and a computer system including the semiconductor device

Seigou Yukutake; Takashi Akioka; Kinya Mitsumoto; Takahiro Nagano; Hideo Maejima


Archive | 1994

Semiconductor memory with multiple sets & redundant cells

Noboru Akiyama; Kinya Mitsumoto; Takashi Akioka; Seigoh Yukutake


Archive | 1988

Semiconductor device for a ram disposed on chip so as to minimize distances of signal paths between the logic circuits and memory circuit

Kazuhiro Akimoto; Masami Usami; Katsumi Ogiue; Hiroshi Murayama; Hitoshi Abe; Masamori Kashiyama; Yoshikuni Kobayashi; Satoru Isomura; Kinya Mitsumoto


Archive | 1984

Write circuit for use in semiconductor storage device

Nobuaki Miyakawa; Yoshiaki Yazawa; Shoichi Ozeki; Kinya Mitsumoto


Archive | 1996

Synchronous memory with pipelined write operation

Seigoh Yukutake; Kinya Mitsumoto; Takashi Akioka; Masahiro Iwamura; Noboru Akiyama


Archive | 1996

Semiconductor memory device and sense circuit

Hideto Kazama; Shuichi Miyaoka; Akihiko Emori; Kinya Mitsumoto; Tomoyuki Someya; Masahiro Iwamura; Noboru Akiyama


Archive | 1994

High-speed semiconductor memory device and data processing system using the same

Akihiro Tamba; Masahiro Iwamura; Yutaka Kobayashi; Kinya Mitsumoto; Tatsumi Yamauchi; Shuko Yamauchi; Takashi Akioka

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