Kumiko Konishi

Electrical Characteristics of Large Chip-Size 3.3 kV SiC-JBS Diodes

The reduction of reverse leakage currents was attempted to fabricate 4H-SiC diodes with large current capacity for high voltage applications. Firstly diodes with Schottky metal of titanium (Ti) with active areas of 2.6 mm2 were fabricated to investigate the mechanisms of reverse leakage currents. The reverse current of a Ti Schottky barrier diode (SBD) is well explained by the tunneling current through the Schottky barrier. Then, the effects of Schottky barrier height and electric field on the reverse currents were investigated. The high Schottky barrier metal of nickel (Ni) effectively reduced the reverse leakage current to 2 x 10-3 times that of the Ti SBD. The suppression of the electric field at the Schottky junction by applying a junction barrier Schottky (JBS) structure reduced the reverse leakage current to 10-2 times that of the Ni SBD. JBS structure with high Schottky barrier metal of Ni was applied to fabricate large chip-size SiC diodes and we achieved 30 A- and 75 A-diodes with low leakage current and high breakdown voltage of 4 kV.

Influence of Trench Structure on Reverse Characteristics of 4H-SiC JBS Diodes

We fabricated trench Junction Barrier Schottky (JBS) diodes, and investigated the effect on the reduction of leakage current and the device yield. First, by calculating of electric field at the Schottky contact interface (Es), we found that the trench JBS structure can reduce Es one digit smaller than the planar JBS structure, setting 80o < The bevel angle θ < 90o. Then, 600 V / 50 A trench JBS diodes are developed and characterized. The leakage current of a trench JBS diode at 600V is 10-2 times smaller than that of planar JBS diode by effectively reducing Es. This enables to reduce the number of low break down samples and raise the yield compared to the planar JBS structure.

6.5 kV 4H-SiC PiN diodes without bipolar degradation

We designed, fabricated and evaluated 6.5 kV SiC PiN diodes. In order to suppress process-induced basal plane dislocation (BPD) in SiC PiN diodes, we improved the fabrication processes. The Ir-Vr measurements showed that the breakdown voltage was over 9 kV at room temperature (25 °C). The leakage currents (Ileak) at 6.5 kV are as low as 5.9×10-6 mA/cm2 (25 °C) and 9.7×10-5 mA/cm2 (150 °C). The maximum recovery loss among our switching test results was 6.7 mJ at 150 °C, 60 A. Moreover, the diodes fabricated on BPD-free area are very stable during applying 20 A current for 8~1000 h. Photoluminescence (PL) observation and KOH etching indicated that no BPD generated during improved fabrication processes.

Investigation of Forward Voltage Degradation due to Process-Induced Defects in 4H-SiC MOSFET

We investigated process induced defects at various ion implantation conditions, and evaluated forward voltage degradation of body diode in 3.3 kV SiC MOSFET. First, by using photoluminescence (PL) observation, we evaluated the formation level of Basal Plane Dislocations (BPD) induced by Al implantation and anneal process with various Al implantation dose. Second, 3.3 kV double-diffused SiC MOSFETs were fabricated and forward current stress tests were performed to body diodes in SiC MOSFETs. Then, electrical characteristics of SiC MOSFETs before and after the stress test were measured, and expanded Stacking faults (SFs) in SiC epitaxial layer after the stress test were observed by PL imaging method. These results indicate that low dose or high temperature Al implantation conditions can suppress the formation of BPDs, and SiC MOSFETs fabricated using optimized Al implantation conditions show high reliability under current stress test.

Switching Reliability of SiC-MOSFETs Containing Expanded Stacking Faults

To investigate effect of stacking faults (SFs) on switching reliability, we carried out switching tests using SiC-MOSFETs containing expanded SFs. Before the switching test, current stress was applied to the internal body-diode devices under test (DUTs) to expand SFs. The circuit configuration of the switching test we used was a half-bridge type and a double-pulse gate signal was applied to the lower arm DUT. The switching-voltage was 1.8kV and switching-current increased in about 8A steps to breakdown. Reverse recovery safety operation area (RRSOA) breakdown switching-current decreased dependently on the degree of SiC-MOSFET degradation. Reverse bias SOA (RBSOA) did not decrease even if degraded SiC-MOSFETs were used.

Analysis of high reverse currents of 4H-SiC Schottky-barrier diodes

Nickel (Ni), titanium (Ti), and molybdenum (Mo) 4H-silicon carbide Schottky-barrier diodes (SiC SBDs) were fabricated and used to investigate the relation between forward and reverse currents. Temperature dependence of reverse current follows a theory that includes tunneling in regard to thermionic emission, namely, temperature dependence is weak at low temperature but strong at high temperatures. On the other hand, the reverse currents of the Ni and Mo SBDs are higher than their respective currents calculated from their Schottky barrier heights (SBHs), whereas the reverse current of the Ti SBD agrees well with that calculated from its SBH. The cause of the high reverse currents was investigated from the viewpoints of low barrier patch, Gaussian distribution of barrier height (GD), thin surface barrier, and electron effective mass. The high reverse current of the Ni and Mo SBDs can be explained not in terms of a low-barrier patch, GD, or thin surface barrier but in terms of small effective masses. Investigation of crystal structures at the Schottky interface revealed a large lattice mismatch between the metals (Ni, Ti, or Mo) and SiC for the Ni and Mo SBDs. The small effective mass is possibly attributed to the large lattice mismatch, which might generate transition layers at the Schottky interface. It is concluded from these results that the lattice constant as well as the work function is an important factor in selecting the metal species as the Schottky metal for wide band-gap SBDs, for which tunneling current dominates reverse current.Nickel (Ni), titanium (Ti), and molybdenum (Mo) 4H-silicon carbide Schottky-barrier diodes (SiC SBDs) were fabricated and used to investigate the relation between forward and reverse currents. Temperature dependence of reverse current follows a theory that includes tunneling in regard to thermionic emission, namely, temperature dependence is weak at low temperature but strong at high temperatures. On the other hand, the reverse currents of the Ni and Mo SBDs are higher than their respective currents calculated from their Schottky barrier heights (SBHs), whereas the reverse current of the Ti SBD agrees well with that calculated from its SBH. The cause of the high reverse currents was investigated from the viewpoints of low barrier patch, Gaussian distribution of barrier height (GD), thin surface barrier, and electron effective mass. The high reverse current of the Ni and Mo SBDs can be explained not in terms of a low-barrier patch, GD, or thin surface barrier but in terms of small effective masses. Investi...

Effect of trench structure on reverse characteristics of 4H-SiC junction barrier Schottky diodes

We investigated 4H-SiC trench junction barrier Schottky (JBS) diodes from the viewpoints of the tradeoff between the electric field at the Schottky contact interface (E s) and the forward voltage drop, the effect on reduction of reverse leakage current, and the device yield. By calculating E s, we found that the trench JBS structure can make E s one order of magnitude smaller than that of the planar JBS structure, when the bevel angle (θ) is set between 80 and 90°. Moreover, 600 V/50 A trench JBS diodes were fabricated, and their reverse leakage current at 600 V was made 102 times smaller than that of the planar JBS diode by effectively reducing E s. We also found that this reduction in reverse leakage current decreases the number of low breakdown voltage samples below 600 V and improves the yield.

Modeling of stacking fault expansion velocity of body diode in 4H-SiC MOSFET

We present a model to explain forward voltage degradation of body diode in 4H-SiC MOSFET, and evaluate the velocity of SF expansion. First, by using in-situ photoluminescence (PL) observation, we investigated how a stacking fault (SF) expands from a basal plane dislocations (BPD) in the 4H-SiC epitaxial layer. Second, double-diffused MOSFETs were developed and measured before and after degradation. Then, the characteristics of the forward voltage degradation were modeled by a combination of PL imaging and electrical measurement, and the calculated characteristics are in good agreement with the measured ones. Finally, we tested the SiC MOSFETs under various stress conditions and evaluated the velocity of the SF expansion by calculation. This results indicate that the velocity of SF expansion increased with increasing forward current density and junction temperature.

3.3 kV 4H-SiC DMOSFET with highly reliable gate insulator and body diode

We investigated improvement ways of to overcome these reliability issues in a 3.3 kV 4H-SiC DMOSFET. JFET doping with (i) narrow width and (ii) deeper depth than that of the p-well region successfully reduced the electric field in the gate insulator and the on-voltage simultaneously. We achieved a low Ron of 26 mΩcm2 at a Vg of +15 V and 150 °C. And highly reliable chips of 0.1 Fit were also achieved both at a positive and negative gate bias of +15 V/ -8 V with MTTF of intrinsic lifetime over 20 years at 3 MV/cm. BTI characterstics both in positive and negative biases also proved reliability over 20 years. The body diode showed stable behavior under forward current operation which is suitable for an external diode-less power module.

Novel trench-etched double-diffused SiC MOS (TED MOS) for overcoming tradeoff between R on A and Q gd

To improve both conduction loss and switching loss, trench-etched double-diffused MOS (TED MOS) is proposed and fabricated. The trench side channels of TED MOS can provide both high channel mobility and wide channel width to decrease on-resistance (RonA). Moreover, TED MOS also achieves low gate-to-drain capacitance because its gates and trenches are completely covered with a P-body. Our results show that the figure of merit (RonA×Qgd) of TED MOS can be reduced by 70% compared to that of a conventional double-diffused MOS.