Lili Ding

CHIPIX65: Developments on a new generation pixel readout ASIC in CMOS 65 nm for HEP experiments

Pixel detectors at HL-LHC experiments or other future experiments are facing new challenges, especially in terms of unprecedented levels of radiation and particle flux. This paper describes the progress made by the CHIPIX65 project of INFN for the development of a new generation readout ASIC using CMOS 65 nm technology.

Analysis of TID Failure Modes in SRAM-Based FPGA Under Gamma-Ray and Focused Synchrotron X-Ray Irradiation

This study investigates the total ionizing dose effect in static random access memory (SRAM)-based field programmable gate array (FPGA). In addition toY ray whole-chip irradiation, focused synchrotron x-ray irradiation with beam size of 20 μm is also used. As a result, the most vulnerable inner circuit in the SRAM-based FPGA is determined directly. Circuit simulation is also executed to understand the failure phenomenon further. The simulated results are consistent with the experimental results.

RD53 Collaboration and CHIPIX65 Project for the development of an innovative Pixel Front End Chip for HL-LHC

Natale Demaria∗† INFN Sezione di Torino, Torino, Italy E-mail: demaria@to.infn.it F.Ciciriello, F.Corsi, C.Marzocca Politecnico di Bari, Bari, Italy G.De Robertis, F.Loddo, C.Tamma INFN Sezione di Bari, Bari, Italy V.Liberali, S.Shojaii, A.Stabile INFN Sezione di Milano and Universita degli Studi di Milano, Milano, Italy M.Bagatin, D.Bisello, S.Gerardin, S.Mattiazzo, L.Ding, P.Giubilato, A.Paccagnella INFN Sezione di Padova and Universita di Padova, Padova, Italy F.De Canio, L.Gaioni, M.Manghisoni, V.Re, G.Traversi, E.Riceputi INFN Sezione di Pavia and Universita di Bergamo, Bergamo, Italy L.Ratti, C.Vacchi INFN Sezione di Pavia and Universita di Pavia, Pavia, Italy R.Beccherle, G.Magazzu, F.Morsani, F.Palla INFN Sezione di Pisa, Pisa, Italy G.M.Bilei, M.Menichelli INFN Sezione di Perugia, Perugia, Italy E.Conti, S.Marconi, D.Passeri, P.Placidi INFN Sezione di Perugia and Department of Engineering, Universita di Perugia, Italy G.Dellacasa, G.Mazza, A.Rivetti, M.D.Da Rocha Rolo INFN Sezione di Torino, Torino, Italy E.Monteil, L.Pacher INFN Sezione di Torino and University of Torino, Torino, Italy

The reliability and availability analysis of SEU mitigation techniques in SRAM-based FPGAs

Field Programmable Gate Arrays (FPGAs) are becoming an appealing solution in space applications due to their high performance, low cost and flexibility. Unfortunately, reconfigurable SRAM-based FPGAs are extremely susceptible to radiation induced Single Event Upsets (SEUs), especially when COTS components are largely adopted today. SEUs can not be eliminated completely using processing or layout solution, but their destructive effect can be mitigated through fault tolerant design techniques, e.g. redundancy structure, bitstream repair techniques or a combination of them. Meanwhile, the effectiveness of these mitigation techniques should be evaluated before using them in real applications. In this paper, several analytical reliability models are proposed to describe the reliability as well as the availability behavior of these mitigation strategies. These models may help designers to select proper level of protection according to the reliable specification of their system.

Analysis of the TID Induced Failure Modes in NOR and NAND Flash Memories

The total ionizing radiation effects of several NOR and NAND flash memories under the read only mode are investigated. An X-ray microbeam test was also performed to help detect the radiation susceptibility of different circuits. The error distribution is mapped for the NOR flash memories, featuring significant address related signature. Relevant circuits are analyzed to address these failure modes.

Single-Event Multiple Transients in Conventional and Guard-Ring Hardened Inverter Chains Under Pulsed Laser and Heavy-Ion Irradiation

Single-event multiple transients (SEMTs) are investigated using an on-chip self-triggered circuit. Measured results for inverter chains of two layout designs, including a guard-ring design and a conventional design, are compared under pulsed laser and heavy-ion (Bi) irradiations. Pulsed laser exposures of different energies and Bi heavy-ion irradiation at different injection angles, including along the well direction and across the well direction, are found to produce SEMTs with different probabilities. The use of a guard-ring hardening technique is demonstrated to be very effective in reducing production of SEMTs for inverters without direct electrical connection. Charge sharing-induced SEMTs are found to have different pulsewidth distributions for angled ion incidence than normal ion or laser incidence.

Enhancement of Transistor-to-Transistor Variability Due to Total Dose Effects in 65-nm MOSFETs

We studied device-to-device variations as a function of total dose in MOSFETs, using specially designed test structures and procedures aimed at maximizing matching between transistors. Degradation in nMOSFETs is less severe than in pMOSFETs and does not show any clear increase in sample-to-sample variability due to the exposure. At doses smaller than 1 Mrad( SiO2) variability in pMOSFETs is also practically unaffected, whereas at very high doses-in excess of tens of Mrad( SiO2)-variability in the on-current is enhanced in a way not correlated to pre-rad variability. The phenomenon is likely due to the impact of random dopant fluctuations on total ionizing dose effects.

Drain Current Collapse in 65 nm pMOS Transistors After Exposure to Grad Dose

Total ionizing dose (TID) response of pMOS transistors featuring a commercial 65 nm CMOS technology was studied by X-ray irradiation up to 1 Grad (SiO2), which emulated total dose target in the LHC upgrade. After irradiation, dramatic reduction of drain current was observed, the degradation level showed a strong dependency on gate width. At total doses higher than 208 Mrad(SiO2), the off-state leakage was heightened by more than one order of magnitude, which was attributed to the gate-induced drain leakage (GIDL) due to the positive charge trapping in STI and/or gate oxide. The subthreshold swing (SS) and the threshold voltage remained practical constant even at 1 Grad (SiO2) total dose. The degradation in the drain current can be partially explained by the radiation induced narrow channel effect due to the positive charge trapping in STI. However, from the comparison results under two bias conditions during irradiation, there must be other mechanisms contributing together. Damage of the gate oxide could be another mechanism contributing to the dramatic drain current reduction.

Total Ionizing Dose Effects in Si-Based Tunnel FETs

Total ionizing dose (TID) effects in Si-based tunnel finite element transfers (FETs) were investigated for the first time. Under 10-keV X-ray irradiation environment, along with the increase in total dose, a shift of the transfer characteristics and an increase in the interface trap density could be observed. After irradiation at 1 Mrad (SiO2) (and higher dose), the threshold voltage and the band-to-band tunneling conduction were only modestly affected, despite the thick buried oxide (140 nm). In contrast, under the same bias and irradiation environment, a FDSOI nMOSFET fabricated with a similar process presented a more severe degradation, suggesting the robustness of TFETs against TID effects. The underlying mechanism was explored through device simulation and ascribed to be due to the peculiarity of the doping structures of TFETs.

Pattern dependence in synergistic effects of total dose on single-event upset hardness*

The pattern dependence in synergistic effects was studied in a 0.18 μm static random access memory (SRAM) circuit. Experiments were performed under two SEU test environments: 3 MeV protons and heavy ions. Measured results show different trends. In heavy ion SEU test, the degradation in the peripheral circuitry also existed because the measured SEU cross section decreased regardless of the patterns written to the SRAM array. TCAD simulation was performed. TID-induced degradation in nMOSFETs mainly induced the imprint effect in the SRAM cell, which is consistent with the measured results under the proton environment, but cannot explain the phenomena observed under heavy ion environment. A possible explanation could be the contribution from the radiation-induced GIDL in pMOSFETs.