M. Miura-Mattausch

Compact reliability model for degradation of advanced p-MOSFETs due to NBTI and hot-carrier effects in the circuit simulation

A compact reliability model is reported, which includes both the channel hot carrier (CHC) and the negative bias thermal instability (NBTI) effects in p-MOSFETs. The developed compact NBTI model, which describes both interface-state generation and hole-trapping mechanisms, is further improved by considering additionally the impact of the drain bias Vds. With increased Vds, the NBTI effect is weakened due to the reduction of the vertical gate oxide field, and the CHC effect is enhanced by the increased lateral channel electric field. Therefore, the threshold voltage is observed to decrease in the low Vds regime, and then increases again in the high Vds regime. Such “turn-around” characteristic is correctly modeled using the improved compact NBTI model. Implementation of this reliability model into the surface-potential-based compact model HiSIM enables accurate prediction of the CHC enhanced NBTI degradation for wide ranges of time duration and bias conditions. This allows real-time simulation for the circuit-performance degradation occurring during actual circuit operation.

Validity of mobility universality for scaled metal–oxide–semiconductor field-effect transistors down to 100 nm gate length

Mobility universality, confirmed for long-channel metal–oxide–semiconductor field-effect transistors (MOSFETs), is demonstrated to be preserved for scaled MOSFET technologies down to 100 nm gate length, although phenomena such as quantum-mechanical and poly-silicon depletion effects play important roles. This result was obtained by applying a compact model based on the drift-diffusion approximation and relying only on Ids–Vgs measurements instead of using a conventional method with supplemental Cgate–Vgs measurements. It is confirmed that the carrier mobility is still governed by the electric field applied, and that the drift-diffusion approximation remains valid down to channel length of 100 nm. Consequently, the carrier behavior of such scaled small-size MOSFETs can be precisely described by simple analytical equations, which is important for the development of efficient circuit-simulation models.

A Surface Potential Based Organic Thin-Film Transistor Model for Circuit Simulation Verified With DNTT High Performance Test Devices

A compact surface potential based model for organic thin-film transistors (OTFTs), including both tail and deep trap states across the band gap, is reported. The model has been developed on the basis of a complete surface potential approach for undoped-body OTFTs. Accurate surface potentials are calculated by explicitly including the floating backside potential that varies with applied biases. A pseudo-2D resistor model is developed to capture the structural features of the OTFT. The resistor model considers, in particular, the effects originating from a bias dependent 2D current flow in the channel region and results in accurate reproduction of the electrical characteristics. The fitting capability of the developed OTFT model is verified against measured high-performance dinaphtho thieno thiophene (DNTT) based field-effect transistor data. Accurate reproduction of the current characteristics of the OTFT test structures is verified from a week to a strong inversion regime.

Modeling of enhanced 1/ƒ noise in TFT with trap charges

We have investigates influence of existing trap states of TFT on device characteristics with use of the compact model HiSIM-TFT. Special focus is given on the 1/ƒ noise characteristics, where it is found the Vgs dependence of the 1/ƒ noise characteristics is very sensitive to the trap density distributions. We have successfully extracted high density of the shallow trap states with the measured 1/ƒ noise characteristics.

MOSFET harmonic distortion analysis up to the non-quasi-static frequency regime

MOSFET harmonic distortion characteristics up to the cutoff frequency (fT) are measured and analyzed with the MOSFET model HiSIM. While distortion characteristics at low frequency are determined by carrier mobility, characteristics at high frequency are influenced by the time delay of carriers to form the channel. At low frequency, IP3 values, calculated using a quasi-static model, correspond to values from the conventional method of extraction. For accurate prediction of IP3, non-quasi-static effects become necessary at high-frequency switching above fT/2

Modeling of Carrier Transport Dynamics at GHz-Frequencies for RF Circuit-Simulation

Carrier dynamics in a MOSFET channel under fast time-varying gate input is included in the modeling for circuit simulation and implemented in SPICE3f5 at only 7% increased computational runtime cost. Correct reproduction of transient drain currents as well as harmonic-distortion characteristics are verified. While the carrier dynamics under low-frequency operation is mostly governed by the carrier mobility in the channel, the dominant factor under high-frequency operation changes to channel charging and discharging.

Physically Based Compact Mobility Model for Organic Thin-Film Transistor

A physically based compact mobility model for organic thin-film transistors (OTFTs) with an analysis of bias-dependent Fermi-energy (EF) movement in the bandgap (Eg) is presented. Mobility in the localized and extended energy states predicts the drain-current behavior in the weak and strong accumulation operations of OTFTs, respectively. A hopping mobility model as a function of the surface potential is developed to describe the carrier transport through localized energy states located inside Eg. The Poole-Frenkel parallel-field-effect mobility and vertical-field-effect mobility are considered to interpret the bandlike carrier transport in the extended energy states. The parallel field effect on mobility is more pronounced for shorter channel length OTFTs and is considered by developing a channel-length-dependent mobility model. The vertical field effect on mobility is included to account for the effect of mobility on carrier transport at high gate-voltage-induced fields. We also compared the model results with 2-D device simulations and measurements to verify the developed mobility model.

Benchmarking of a surface potential based organic thin-film transistor model against C 10 -DNTT high performance test devices

In this paper, a surface potential based compact model for organic thin-film transistors (OTFTs) including both tail and deep trap states across the band gap is presented and benchmarked against measured data from high-performance dinaphtho thieno thiophene (C10-DNTT) based test devices. This model can accurately describe the OTFT test-structure current from week to strong inversion regime.

HiSIM2 Circuit simulation - Solving the speed versus accuracy crisis

The development trend in compact modeling goes toward surface-potential-based approaches and leads to models like HiSIM2, with higher accuracy, fewer model parameters, and shorter computer runtime than achievable with the conventional threshold-voltage-based approaches. The main motivation for continuing this development effort is to realize a sufficient design capability of RF circuits with advanced MOSFETs, where many higher-order phenomena affect the circuit performance, as well as of large mixed-signal circuits, where both accuracy and short simulation time are a must. The trend toward the surface potential brings compact modeling for circuit simulation also much closer to 2D and three-dimensional numerical device simulation. Therefore, both approaches can now come together and work united to achieve the common goal of realizing rapid technology progress for the benefit of the society

HiSIM-SOI: Complete surface-potential-based model valid for all SOI-structure types

The compact SOI-MOSFET model HiSIM-SOI based on the complete surface-potential description is presented. The model considers all possible charges induced in the device for the formulation of the Poisson equation, which is solved iteratively. Thus HiSIM-SOI is valid for any structural variations from thick to extremely thin SOI or BOX layers. The dynamic depletion between the fully and partially depleted conditions is well reproduced. It is also demonstrated that the floating-body effect can be accurately captured by considering the accumulated charge in the SOI layer for the solution of the Poisson equation. HiSIM-SOI is verified to correctly reproduce 2D-device simulation results automatically for different SOI-structure types without any additional option setting.