Masafumi Asano

Impact of Sampling on Uncertainty : Semiconductor Dimensional Metrology Applications

The International Technology Roadmap for Semiconductors (ITRS) provides a set of Metrology specifications as targets for each technology node. In the current edition (2007) of the ITRS the conventional precision (reproducibility) is replaced with a new metric - measurement uncertainty for dimensional metrology. This measurement uncertainty contains single tool precision, tool-to-tool matching, sampling uncertainty, and inaccuracy (sample-to-sample bias variation and other effects). Clearly, sampling uncertainty is a major component of measurement uncertainty. This paper elaborates on sampling uncertainty and provides statistical estimates for sampling uncertainty. The authors in this paper address the importance and the methods of proper sampling. The correct sampling captures and allows for the expression of the information needed for adequate patterning process control. Along with typical manufacturing process control cases (excursion control, advanced and statistical process control), several other applications are explored such as optical and electron beam line width measurement calibration, measurement tool evaluations, lithographic scanner assessment and optical proximity correction implementation. The authors show how appropriate choices among measurement techniques, sampling methods, and interpretation of measurement results give meaningful information for process control and demonstrate how an incorrect choice can lead to wrong conclusions.

Sub-100 nm Lithography with KrF Exposure Using Multiple Development Method

In this paper, a novel resist process technique using a chemically amplified resist with a multiple development method for improving photolithography resolution is described. By means of this technique, resist lines are formed at the edge position between the bright and dark fields of a photomask, and the repeating frequency that is more than the cutoff frequency of optics (νc=1/Pc=2NA/λ) can be delineated using a conventional exposure system. In the experiment, a grating resist pattern with a pitch of 200 nm was obtained using a conventional 0.6 NA KrF exposure system and a 400 nm pitch photomask pattern. The pitch was less than the diffraction limit of 207 nm (=0.5λ/NA) in the optical system used, which cannot be realized by a conventional resist process even with resolution enhancement techniques such as off-axis illumination and phase-shifting mask.

Evaluation of producer’s and consumer’s risks in scatterometry and scanning electron microscopy metrology for inline critical dimension metrology

Measurement characteristics in scatterometry and critical dimension-scanning electron microscopy CD-SEM for lot acceptance sampling of inline CD metrology were investigated by using a statistical approach with Monte Carlo simulation. By operation characteristics curve analysis, producers risk and consumers risk arising from sam- pling were clarified. Single use of scatterometry involves a higher risk, such risk being particularly acute in the case of large intrachip CD varia- tion because it is unable to sufficiently monitor intrachip CD variation including local CD error. Substituting scatterometry for conventional SEM metrology is accompanied with risks, resulting in the increase of unnec- essary cost. The combined use of scatterometry and SEM metrology in which the sampling plan for SEM is controlled by scatterometry is a promising metrology from the viewpoint of the suppression of risks and cost. This is due to the effect that CD errors existing in the distribution tails are efficiently caught.

Hybrid approach to optical CD metrology of directed self-assembly lithography

Directed Self Assembly (DSA) for contact layers is a challenging process in need of reliable metrology for tight process control. Key parameters of interest are guide CD, polymer CD, and residual polymer thickness at the bottom of the guide cavity. We show that Optical CD (OCD) provides the needed performance for DSA contact metrology. The measurement, done with a multi-channel spectroscopic reflectometry (SR) system, is enhanced through elements of a Holistic Metrology approach such as Injection and Hybrid Metrology.

Novel in-situ focus monitor technology in attenuated PSM under actual illumination condition

A focus monitor technology for attenuated PSM under annular illumination has been developed as an in-line quality control. The focus monitor pattern on a reticle employs a pair of grouped lozenge-shaped opening patterns in attenuated phase shifting region. Since the phase shifting angles of the light passing through the first and second opening patterns are 90 degrees and 180 degrees, respectively, the best focus position for the first pattern shifts to that for the second pattern. The subtraction of the length of the patterns is a linear function of the actual focal position printed on the wafer. Therefore, the effective focal position can be extracted by measuring the subtraction of the measured length. A high resolution of 10-nm defocus could be achieved by this technique.

Run-to-Run CD Error Analysis and Control with Monitoring of Effective Dose and Focus

We have developed in-line dose and focus monitoring techniques for the detailed analysis of critical dimension error and accurate process control. From exposed wafers, effective does and focus are measured with specificed monitor marks built on a reticle. The contributions of effective dose and focus to critical dimension error on device chips were clarified in a fabrication proces of 110 nm isolated pattern with a KrF scanner. The critical dimensions error was described as a function of effective dose and focus, which include various process fluctuations. We could determine whether current exposure settings such as dose input and focus input were adequate or not. Based on the experimental data, we estimated the benefit of simultaneous Run-to-Run control of dose and focus. The estimation clarifies that it realizes total critical dimension control including Run-to-Run and intra-Run.

Sampling plan optimization for critical dimension metrology

To enhance the quality of Advanced Process Control APC, the optimization of the sampling plan in critical dimension CD metrology is studied through empirical considerations concerning the characteris- tics of errors and a statistical approach. The metric of the optimization is the accuracy of lot mean estimation. Critical dimension errors are clas- sified into static and dynamic errors. A static error is defined as an error that repeats through lots while keeping its tendency, and a dynamic error as an error whose tendency changes by lot. In the basic concept of our sampling plan, sampling positions and size are determined from the static error and dynamic error, respectively. The balance of the sampling number of the wafer, field, and site under the restriction of total sampling size is optimized by a statistical theory.

Impact of shrinking measurement error budgets on qualification metrology sampling and cost

When designing an experiment to assess the accuracy of a tool as compared to a reference tool, semiconductor metrologists are often confronted with the situation that they must decide on the sampling strategy before the measurements begin. This decision is usually based largely on the previous experience of the metrologist and the available resources, and not on the statistics that are needed to achieve acceptable confidence limits on the final result. This paper shows a solution to this problem, called inverse TMU analysis, by presenting statistically-based equations that allow the user to estimate the needed sampling after providing appropriate inputs, allowing him to make important “risk vs. reward” sampling, cost, and equipment decisions. Application examples using experimental data from scatterometry and critical dimension scanning electron microscope (CD-SEM) tools are used first to demonstrate how the inverse TMU analysis methodology can be used to make intelligent sampling decisions before the start of the experiment, and then to reveal why low sampling can lead to unstable and misleading results. A model is developed that can help an experimenter minimize the costs associated both with increased sampling and with making wrong decisions caused by insufficient sampling. A second cost model is described that reveals the inadequacy of current TEM (Transmission Electron Microscopy) sampling practices and the enormous costs associated with TEM sampling that is needed to provide reasonable levels of certainty in the result. These high costs reach into the tens of millions of dollars for TEM reference metrology as the measurement error budgets reach angstrom levels. The paper concludes with strategies on how to manage and mitigate these costs.

Patterning strategy and performance of 1.3NA tool for 32nm node lithography

We have designed the lithography process for 32nm node logic devices under the 1.3NA single exposure conditions. The simulation and experimental results indicate that the minimum pitches should be determined as 100nm for line pattern and 120nm for contact hole pattern, respectively. The isolated feature needs SRAF to pull up the DOF margin. High density SRAM cell with 0.15um2 area is clearly resolved across exposure and focus window. The 1.3NA scanner has sufficient focus and overlay stability. There is no immersion induced defects.

Metrology and inspection required for next generation lithography

We summarize the metrology and inspection required for the development of nanoimprint lithography (NIL) and directed self-assembly (DSA), which are recognized as candidates for next generation lithography. For NIL, template inspection and residual layer thickness (RLT) metrology are discussed. An optical-based inspection tool for replica template inspection showed sensitivity for defects below 10 nm with sufficient throughput. Scatterometry was applied for RLT metrology. Feedback control with scatterometry improved RLT uniformity across an imprinting field. For DSA, metrology for image placement and cross-sectional profile are addressed. Design-based scanning electron microscope (SEM) metrology utilizing a die-to-database electron beam (EB) inspection tool was effective for image placement metrology. For the cross-sectional profile, a holistic approach combining scatterometry and critical dimension SEM was developed. The technologies discussed here will be important when NIL and DSA are applied for IC manufacturing, as well as in the development phases of those lithography technologies.