Mauro Scandiuzzo

Input/Output Pad for Direct Contact and Contactless Testing

Non-contact probing can provide an important contribution for testing complex Systems-on-a-Chip (SoC), Systems-in-a-Package (SiP) and Through-Silicon-Vias (TSV) interconnections. This paper demonstrates the feasibility of wireless testing by capacitive coupling between a cantilever probe card and a pad. In particular a scheme of an I/O pad suitable for both contact and contactless probing is proposed.

Chip-to-chip communication based on capacitive coupling

This paper presents a review of the solutions proposed for chip-to-chip communication based on capacitive coupling. Circuit designs, assembly options and various different test cases are presented in this work. It is shown that this 3D technology is capable of transferring digital data between two dies at high-speed with low power consumption, and likewise analog signals without the need for any extra-wafer processing. The results presented highlight the key features of capacitive coupling when compared to other 3D interconnections and justify the effort to overcome some open issues and make it a marketable technology.

System on chip with 1.12mW-32Gb/s AC-coupled 3D memory interface

An AC-coupled 3D memory interface for chip-to-chip communication is implemented in 90nm CMOS technology. It transfers 128 bit words between stacked SRAMs in an ARM-based System on Chip (SoC) platform at 250MHz. This interface requires 0.05mm2 of occupation area and achieves a 32Gbit/sec of throughput and an average energy consumption of 35µW/Gbit/sec.

3D capacitive transmission of analog signals with automatic compensation of the voltage attenuation

An architecture to compensate the voltage attenuation introduced by 3D capacitive coupling is proposed. The scheme is applied to the design of a prototype aimed at demonstrating that 3D technology based on capacitive coupling allows to transmit analog signals as well as digital ones. The scheme is based on a calibration channel which sets the gain of the variable gain amplifiers of signal channels in order to compensate for the voltage attenuation. The prototype is designed in CMOS 90 nm technology. 3D assembling is done at die level using a face to face stacking procedure. Each channel has an area 90x30 µm2 and a power consumption of 1 mW. A gain error within 10% with respect to the nominal value has been measured for a signal amplitude varying from 200 mV to 1 V in the 100 KHz to 20 MHz range.

3D system on chip memory interface based on modeled capacitive coupling interconnections

A memory interface for a 3D System-on-a-Chip based on capacitive coupling is implemented in 90nm CMOS technology. The design choices have been driven by an innovative 3D extraction and simulation flow. The presented work exploits AC capacitive coupling for chip-to-chip communication running up to 250MHz. The interface transfers 128 bit words between stacked SRAMs in an ARM-based System-on-a-Chip (SoC). The 3D memory interface achieves a total throughput of 32Gbit/sec with an average energy consumption of 35μW/Gbit/sec and an area occupancy of 0.05mm2.

Automatic Compensation of the Voltage Attenuation in 3-D Interconnection Based on Capacitive Coupling

An architecture to compensate the voltage attenuation introduced by 3-D capacitive coupling is proposed. The scheme is based on a calibration channel which sets the gain of the variable gain amplifiers of the signal channels in such a way as to compensate for the voltage attenuation. Based on this architecture, a prototype has been designed aimed at demonstrating that 3-D technology based on capacitive coupling allows one to transmit analog signals as well as digital ones. CMOS 90 nm technology was used and 3-D assembly is done at die level using a face to face stacking procedure. The area of each signal channel and of the calibration channel is 90 × 30 μm2 and 138 × 191 μm2, respectively, with a power consumption of 1 mW and 3.6 mW. A gain error within 10% of the nominal value was measured for signal amplitudes varying from 200 mV to 1 V in the 100 kHz to 20 MHz range.