Maziar M. Naiini

Fully etched grating couplers for atomic layer deposited horizontal slot waveguides

Compact broadband grating couplers are designed and studied utilizing Atomic Layer Deposited Horizontal Slot waveguides, with four well-known material layers as the slot. Fabrication process conditions are experimentally studied to obtain more optimized designs. With the precision of the film thickness and refractive index provided by ALD, fabrication of reproducible grating couplers is feasible. An overview of design guidelines regarding the slot size and slot material is provided by 2D Finite Element Method calculations.

Embedded graphene photodetectors for silicon photonics

Graphene has extraordinary electronic and optoelectronic properties such as high carrier mobility, large charge-carrier concentrations, tunability via electrostatic doping, wavelength-independent absorption, and relatively low dissipation rates. The combination of its electro-optical properties with its manufacturability and CMOS integrability makes graphene an extremely promising candidate for active photonic devices. Because of its two-dimensional appearance, graphene has a limited light absorption, which is not enough to fulfill the requirements of silicon photonics technology. Recently, the integration of graphene with silicon waveguides has been shown for on-chip applications. In these solutions graphene is placed on top and outside of the waveguide yielding only limited light-graphene interaction. We introduce novel photo-detector architecture by embedding CVD-graphene inside the slot layer of deposited high-k slot waveguides that are compatible with back-end-of-the-line manufacturing of photonic integrated circuits (PICs). This approach leads to a high light-graphene interaction due to the high mode concentration in the slot region. This results in enhanced absorption and enables a very compact photodetector design.

Low loss high-k slot waveguides for silicon photonics

Silicon photonic integrated circuits are promising solutions for high speed on-chip data communication. Producing crystalline silicon optical waveguides at the backend of the IC process flow requires wafer-bonding and a deep substrate etching of an SOI wafer. Fabrication of optical interconnects is less complex and more cost effective if deposited amorphous silicon can be used instead. Amorphous silicon on the other hand suffers from a high absorption. Slot waveguide is a suitable solution for integration of alternative materials with silicon waveguides. Active devices with slot waveguides have been reported by Ramirez et al where the slot layer is doped with rare-earth metals to generate light. In this work successful fabrication and characterization of CMOS compatible low loss high-k amorphous silicon slot waveguides is reported.

Double slot high-k waveguide grating couplers for silicon photonics

Fully etched grating couplers are manufactured for double slot high-k waveguides. These couplers have a maximum efficiency of 22 %. This higher achieved efficiency despite the lack of a matching fluid compared to the case of single slots (18.5 % ) is due to the higher confinement of the optical power in the slot region for the double slot structures. Doubling the slot number reduces the effective refractive index from 2.7 to 2.2.

Integrating 3D PIN germanium detectors with high-k ALD fabricated slot waveguides

A novel device technology for photonics integrated circuits (PICs) is presented. In this work germanium PIN photodetectors are embedded in back-end deposited high-k slot waveguides. The waveguides are fabricated using chemical vapor deposited amorphous silicon and atomic layer deposition of Al2O3 thin films. The germanium PIN stack is selectively grown on a bulk silicon substrate. The detectors are butt coupled to the slot waveguides. Using our selective germanium growth and interconnect technology we study a 3D multilayer photonic integration for CMOS back-end of the line (BEOL) process. Finally we demonstrate the fabrication of a photonic chip deploying this technology platform.

CMOS compatible ALD high-k double slot grating couplers for on-chip optical interconnects

Silicon-on-insulator(SOI) novel on-chip grating couplers for double slot high-k waveguides are experimentally demonstrated. The devices were fabricated with standard CMOS process technology. The grating couplers were designed for the best performance at the C-band communication range. Two thin layers of aluminum oxide formed the slot region of the waveguide. The high-k layers were deposited using the atomic layer deposition (ALD) method. A reliable process was realized by etching the structures to the buried oxide. Effect of the top oxide cladding layer on the efficiency was studied. The grating couplers had a measured efficiency of 22% at 1.55μm wavelength. This efficiency is competitive to other results reported by other groups.