Michael Boers
Broadcom
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Publication
Featured researches published by Michael Boers.
international solid-state circuits conference | 2014
Michael Boers; Iason Vassiliou; Saikat Sarkar; Sean Nicolson; Ehsan Adabi; Bagher Afshar; Bevin George Perumana; Theodoros Chalvatzis; S. Kavadias; Padmanava Sen; Wei Liat Chan; Alvin Yu; Ali Parsa; Med Nariman; Seunghwan Yoon; Alfred Grau Besoli; Chryssoula Kyriazidou; Gerasimos Zochios; Namik Kocaman; Adesh Garg; Hans Eberhart; Phil Yang; Hongyu Xie; Hea Joung Kim; Alireza Tarighat; David Garrett; Andrew J. Blanksby; Mong Kuan Wong; Durai Pandian Thirupathi; Siukai Mak
The IEEE 802.11ad standard supports PHY rates up to 6.7 Gbps on four 2 GHz-wide channels from 57 to 64 GHz. A 60 GHz system offers higher throughput than existing 802.11ac solutions but has several challenges for high-volume production including: integration in the host platform, automated test, and high link loss due to blockage and polarization mismatch. This paper presents a 802.11ad radio chipset capable of SC and OFDM modulation using a 16TX-16RX beamforming RF front-end, complete with an antenna array that supports polarization diversity. To aid low-cost integration in PC platforms, a single coaxial cable interface is used between chips. The chipset is capable of maintaining a link of 4.6 Gbps (PHY rate) at 10 m.
radio frequency integrated circuits symposium | 2010
Michael Boers
A three stage transformer coupled amplifier for operation in the 57–64GHz band is presented. The amplifier uses differential capacitive neutralization and low loss transformers to achieve a gain of 30dB at 61GHz. The amplifier has an output compression point of 7.5dBm and a power added efficiency at 1dB compression of 9% at 57GHz. The amplifier has been fabricated in digital CMOS and occupies an area of 0.055mm2.
radio frequency integrated circuits symposium | 2012
Venumadhav Bhagavatula; Michael Boers; Jacques C. Rudell
This paper presents a wideband Intermediate Frequency (IF) amplifier and downconverter implemented for a 60-GHz receiver in a standard CMOS 40nm process. A Source-Gate Transformer-Feedback based cascode IF amplifier with a flat passband response over a frequency range of 11 GHz to 13 GHz is presented. An on-chip Lange Coupler is used to generate quadrature (I/Q) Local Oscillator (LO) signals. The I/Q downconverter employs a threewinding transformer to couple the transconductance (Gm) stage with the I and Q switching stages. Measured results show a peak receiver downconversion power-gain of 27.6dB with a maximum gain variation of 3.6dB, 4.7dB NF, -22dBm IIP3 while consuming 28.8mW from a 0.9V supply.
Archive | 2010
Arya Reza Behzad; Michael Boers; Jesus Alfonso Castaneda; Ahmadreza Rofougaran; Sam Ziqun Zhao
Archive | 2011
Seunghwan Yoon; Bagher Afshar; Jesus Alfonso Castaneda; Brima Ibrahim; Michael Boers
Archive | 2013
Ahmadreza Rofougaran; Arya Reza Behzad; Sam Ziqun Zhao; Jesus Alfonso Castaneda; Michael Boers
Archive | 2011
Arya Reza Behzad; Ahmadreza Rofougaran; Sam Ziqun Zhao; Jesus Alfonso Castaneda; Michael Boers
Archive | 2011
Arya Reza Behzad; Ahmadreza Rofougaran; Sam Ziqun Zhao; Jesus Alfonso Castaneda; Michael Boers
Archive | 2011
Arya Reza Behzad; Ahmadreza (Reza) Rofougaran; Sam Ziqun Zhao; Jesus Alfonso Castaneda; Michael Boers
Archive | 2010
Ahmadreza Rofougaran; Arya Reza Behzad; Sam Ziqun Zhao; Jesus Alfonso Castaneda; Michael Boers