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Featured researches published by Sam Ziqun Zhao.


2003 International Electronic Packaging Technical Conference and Exhibition, Volume 2 | 2003

Automatic Generation and Validation of Compact Network Models for a Fine Pitch BGA Package

Manoj Nagulapally; Sam Ziqun Zhao

A methodology for automatically generating compact thermal network models of increasing complexity, for use in numerical simulations of general semiconductor integrated circuit (IC) packages is presented. The method is based on the multi-grid agglomeration of the underlying mesh used in the finite volume discretization of the energy conservation equation of the package. The method is applied to a 196-pin fine pitch ball grid array (FBGA) package. Various network topologies and the corresponding network conductances were automatically extracted for this package. These networks were then used in computational fluid dynamics (CFD) simulations for a range of boundary conditions corresponding to single-phase natural and forced convective cooling. Results show good agreement with the detailed package simulations.Copyright


intersociety conference on thermal and thermomechanical phenomena in electronic systems | 2004

Development of RC network compact models of IC packages using multigrid method

Manoj Nagulapally; Gokul Shankaran; Sam Ziqun Zhao

The need for compact models of Integrated circuits (IC) is a well-recognized problem in electronics cooling simulations of electronic systems. Simplified thermal models have been reported in the literature to simulate the transient thermal behavior of IC devices. Most of the simplification approaches require a pre-determined topology of a resistance-capacitance (RC) network. Multigrid technique allows for automatically constructing both the topology and characteristics of the reduced-order or compact models of devices (primarily IC packages) for use in system-level simulations. In this study, we report an approach where the topology and the nodal RC values of the network are automatically generated. The procedure is also applicable for complex IC sub-systems or systems like multi-chip modules, stacked die package, system-in-package, and CPU module, and hard drives. In the study report herein, the method is applied to three types of IC packages. The first package is a 196-pin fine pitch ball grid array (FBGA15/spl times/15/spl I.bar/196 L) package. The second package is a 480-pin plastic ball grid array (PBGA+HS37.5/spl times/37.5/spl I.bar/480 L/spl I.bar/extHS) package with drop-in heat spreader. An external heat sink is attached to the top surface of the package. The third package is an 8-pin small outline IC (SOIC/spl I.bar/480 L) package with a total power dissipation of 0.5 W. RC networks are created for these packages and then used in CFD simulations for different boundary conditions, corresponding to single phase natural and forced convective cooling. The simulation results are compared to the corresponding detailed package simulations.


Archive | 2006

Integrated circuit (IC) package stacking and IC packages formed by same

Sam Ziqun Zhao; Rezaur Rahman Khan


Archive | 2007

Interconnect structure and formation for package stacking of molded plastic area array package

Rezaur Rahman Khan; Sam Ziqun Zhao


Archive | 2005

Methods and apparatus for improved thermal performance and electromagnetic interference (EMI) shielding in leadframe integrated circuit (IC) packages

Sam Ziqun Zhao; Rezaur Rahman Khan


Archive | 2002

Ball grid array package with patterned stiffener layer

Sam Ziqun Zhao; Rezaur Rahman Khan


Archive | 2006

Leadframe IC packages having top and bottom integrated heat spreaders

Sam Ziqun Zhao; Rezaur Rahman Khan


Archive | 2002

Ball grid array package with multiple interposers

Sam Ziqun Zhao; Rezaur Rahman Khan


Archive | 2006

Thermal improvement for hotspots on dies in integrated circuit packages

Sam Ziqun Zhao; Rezaur Rahman Khan


Archive | 2004

ENHANCED DIE-DOWN BALL GRID ARRAY AND METHOD FOR MAKING THE SAME

Rezaur Rahman Khan; Sam Ziqun Zhao

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