Michael Lane

Relationship between interfacial adhesion and electromigration in Cu metallization

A relationship between the adhesion of a Cu conductor to its surrounding medium, the electromigration drift velocity, and lifetime in a conventional electromigration test has been demonstrated. Lifetime measurements demonstrate that the drift velocity and the activation energy for mass transport along an interface correlate with the measured adhesion energy of the interface as determined by a four-point bending test. The results indicate that a linear relationship is expected between the electromigration activation energy and the intrinsic work of adhesion, which is consistent with a simple model relating the two. The data indicate that interfacial cleanliness and bond character at the interface (i.e., metal/dielectric versus metal/metal bonding) have a significant impact on all measured parameters.

Liner materials for direct electrodeposition of Cu

We identified a family of materials which can be directly electroplated with Cu in acidic plating baths commonly found in the microelectronics industry. Details are presented illustrating a number of important properties of the electroplated Cu/linear material system. These include the adhesion of the plated film to liner material, the recrystallization behavior of the plated film, the texture of the plated film, and the resistivity of the plated film after high-temperature anneals. Finally, an example is presented illustrating the direct plating of Cu across an 8 in. wafer without the use of a Cu seed layer.

Electromigration and adhesion

It has been demonstrated that, in those instances where electromigration-induced mass transport is dominated by interfacial diffusion, the adhesion at the interface where mass transport is primarily taking place is related to the electromigration flux. Furthermore, it is shown that the cohesive energy of the interface is directly related to the activation energy for diffusion.

Environmental effects on cracking and delamination of dielectric films

The effects of temperature and moisture on the adhesive and cohesive strength of dielectric materials and the interfaces that are composed of those materials commonly found in thin-film interconnect structures are reviewed. Debond growth rate versus debond driving energy curves (V-G curves) were collected over a range of environmental conditions for both dielectrics and dielectric/metal interfaces. Both are found to exhibit characteristics consistent with stress corrosion cracking mechanisms found in the bulk glass literature. The mechanisms identified in both systems are explained in terms of the salient chemical reactions occurring at the debond tip.

Chip-Package-Interaction Modeling of Ultra Low-k/Copper Back End of Line

Ultra low-k (ULK, k=2.4) dielectric has weaker mechanical properties than first generation low-k films (k=3.0). The introduction of ULK into advanced back end of lines (BEOL) presents a significant challenge due to chip package interaction (CPI) where the packaged die is cycled over a temperature range and the resulting stress can cause ULK BEOL delamination. To avoid CPI failure detailed modeling from the package down to the BEOL must be coupled with quantitative material property measurement. In this paper multi-level finite element models have been used to investigate the parameters which drive CPI failure. It is found that the defect size in the BEOL and the package geometry are key drivers for delamination. Finally, this paper presents a detailed example of the utility of modeling to optimize dicing to reduce defect size, and provide targets for crackstop toughness, which has resulted in a successful reliability qualification of the porous SiCOH (k=2.4) for 45 nm BEOL technology with an organic flip-chip package.

Interface engineering for high interfacial strength between SiCOH and porous SiCOH interconnect dielectrics and diffusion caps

The integration of low- and ultralow-k SiCOH dielectrics in the interconnect structures of very large scale integrated chips involves complex stacks with multiple interfaces. Successful fabrication of reliable chips requires strong adhesion between the different layers of the stacks. A critical interface in the dielectric stack is the interface between the SiCNH diffusion cap and the SiCOH inter- and intralevel dielectrics (ILDs). It was observed that, due to the original deposition conditions, the interface layer was weakened both by a low adhesion strength between SiCNH and SiCOH and by the formation of an initial layer of SiCOH with reduced cohesive strength. The manufacturing process has been modified to engineer this interface and obtain interfacial strengths close to the cohesive strengths of the bulk ILDs. This paper discusses the causes for the original low interfacial strength and presents an approach for enhancing it by engineering the interface to the cap for both the dense SiCOH and porous SiC...

Physical, Electrical, and Reliability Characterization of Ru for Cu Interconnects

Thin film characterization, electrical performance, and preliminary reliability of physical vapor-deposited (PVD) TaN/chemical vapor-deposited (CVD) Ru bilayer were carried out to evaluate its feasibility as a liner layer for back-end of line (BEOL) Cu-low k integration. Adhesion and barrier strength were studied using 4-point bend, X-ray diffraction (XRD), and triangular voltage sweep (TVS) techniques. Electrical yields and line/via resistances were measured at both single and dual damascene levels, with PVD TaN/Ta liner layer as a baseline control. Reliability studies included electromigration (EM) and current-voltage (I-V) breakdown tests

Chip-to-package interaction for a 90 nm Cu / PECVD low-k technology

A summary of chip-to-package interaction (CPI) evaluations for a 90 nm PECVD low k technology will be discussed. This review will cover a 90 nm technology that uses Cu dual damascene interconnections with a SiCOH (K /spl sim/ 3.0) CVD BEOL insulator stack across multiple wirebond package types and flipchip C4 ceramic and organic packages. It will be shown that with the use of IBMs internally engineered SiCOH BEOL insulator, CPI is not an issue with this technology node.

Theory for Electromigration Failure in Cu Conductors

A model for electromigration failure is proposed where the criterion for damage is not classical nucleation forming a void, but is a delamination at an interface. In addition, the anisotropy in the elastic constants of Cu metal is responsible for a bimodal failure distribution recognizing that the driving force for mass transport depends on the hydrostatic stress whereas the failure criterion depends on a normal stress. The agreement with published data is reasonably good.

Experimental Determination of the Toughness of Crack Stop Structures

In this paper we present an experimental approach to the determining the toughness of crackstop structures. It is shown that methods used for adhesion testing can be adapted to quantitatively determine the effective toughness of different crackstop designs. A design based on metal pad shapes connected together with vias is shown to be capable of producing toughnesses that are 3.75 times the intrinsic toughness of the dielectric. In an optimized design we obtain a further 60% improvement in the crackstop toughness. The experiments presented provide an accurate way of determining the effectiveness of crackstop designs in arresting dicing flaws driven by the stresses present in different packages.