Michihiro Morimoto

Three dimensional ICs, having four stacked active device layers

The four-layer-stacked master slice is proposed as a system application for 3-D ICs. The master slice consists of a programmable logic array for logic circuits, a CMOS gate array for I/O interface buffer circuits, and a CMOS SRAM. Fabrication technologies for the four-layer-stacked 3-D IC are described. Laser beam recrystallization was carried out for the formation of three SOI (silicon-on-insulator) layers in the 3-D IC. Recrystallization without cracks in both SOI and vertical isolation layers was accomplished by adjusting laser annealing conditions. Microprobe Raman spectroscopy data indicated that a tensile stress of (3-6)*10/sup 9/ dyne/cm/sup 2/ was present in each SOI layer. Surface planarization of the vertical isolation layer was carried out with a combination of polystyrene spin coating and dry etching. An initial surface roughness of about 1.7 mu m was successfully reduced to less than 500 A, and the planarized surface did not interfere with either recrystallization or photolithography. NMOSFETs and PMOSFETs, fabricated in the four-layer-stacked 3-D IC, have been successfully operated.<<ETX>>

New low noise output amplifier for high definition CCD image sensor

A novel low-noise CCD (charge coupled device) output amplifier, the RJG detector, has been developed. The RJG detector incorporates a JFET having an electrically floating ring-junction gate (RJG). The operating principle is that signal charges, transferred from CCD into the RJG, directly modulate the drain current in the detection JFET. Test devices were fabricated and evaluated with 37-MHz clock frequency. By introducing JFET and achieving complete charge transfer in reset operation, 1/f noise has been reduced and reset noise has been completely eliminated. As a result, input referred noise equivalent electrons within the 18.5 MHz baseband were reduced to 17 (electrons). The RJG detector is confirmed to be suitable for a high-definition CCD image sensor, which requires high-speed operation.<<ETX>>

A 2/3-inch 2 M-pixel IT-CCD image sensor with individual p-wells for separate V-CCD and H-CCD formation

This 2/3-inch optical-lens-format, 2 M-pixel interline-transfer (IT) CCD image sensor achieves large charge handling capability in the vertical CCD (V-CCD), and at the same time ensures sufficient transfer efficiency in the horizontal CCD (H-CCD). A V-CCD/H-CCD connection eliminates the potential barrier caused by separate V-CCD/H-CCD formation. Image sensor performance includes a 40 k-electron charge-handling capability in the V-CCD, leading to a 71 dB dynamic range, and sufficient transfer efficiency in the H-CCD, with no deterioration in V-CCD to H-CCD transfer efficiency. The power consumption is 0.49 W, just 22% of that previously achieved in a 1-inch 2 M pixel frame interline transfer (FIT) CCD. This is possible because the p-well reduces the driving pulse amplitude in the V-CCD and the IT scheme decreases electrode capacitance and driving frequency.<<ETX>>

A 1/4 inch 380 k pixel IT-CCD image sensor employing gate-assisted punchthrough read-out mode

A newly developed 1/4-inch 380 k pixel IT-CCD image sensor features a novel cell structure in which signal charges are read out from a photodiode (PD) to a vertical-CCD (V-CCD) in a gate-assisted punchthrough mode. The cell structure, fabricated through the use of high energy ion implantation technology, enables both deep PD formation and transfer-gate (TG)/channel-stop (CS) length reduction. Deep PD formation helps increase sensitivity per PD unit area, and TG/CS length reduction widens both PD and V-CCD areas. Although the cell size is small (4.8 /spl mu/m (H)/spl times/5.6 /spl mu/m (V)), the sensor achieves both high sensitivity (35 mV/lx) and a high saturation signal (600 mV). >

Optical limitations to cell size reduction in IT-CCD image sensors

We have determined the practical limits of cell size reduction in interline-transfer CCD image sensors, limits resulting from diffraction occurring at the aperture above the photodiode. We have found that image cell size cannot be reduced to a level for which aperture width would fall below about 0.2 /spl mu/m. We have also found, however, that image cells with greater than 0.2 /spl mu/m aperture size are sensitive over the entire wavelength range of visible light, and that sensitivity can be increased by thinning the photoshield film.

Photo response analysis in CCD image sensors with a VOD structure

Photo response in CCD image sensors with Vertical-Overflow-Drain (VOD) was analyzed in an attempt to discover a way to lessen the photo response rise that accompanies increasing incident light intensity in the saturation region. A photo response analysis based on transistor I-V characteristics revealed that the extent of rise in the saturation region is uniquely determined by the non-ideality factor and temperature. Calculation of the non-ideality factor and its dependence on P-well impurity concentration and layer thickness further revealed that fabrication of P-wells with lower impurity concentrations and thicker layers would be effective in suppressing photo response rise. >

A 1/2-in 1.3 M-pixel progressive-scan IT-CCD for digital still camera applications

A 1/2-in 1.3 M-pixel progressive-scan interline-transfer charge-coupled-device (IT-CCD) image sensor has been developed for small, low-power mega-pixel digital still cameras (DSCs). The pixel size as small as 5 /spl mu/m square makes small-size progressive-scan IT-CCD (8.3/spl times/7.1 mm/sup 2/) for the SXGA format. A two-phase-drive horizontal-CCD with phosphorus-implanted storage regions helps reduce the driving voltage to 2.5 V, resulting in the power consumption of the device being as low as 146 mW. A new source-follower amplifier with separate p-well driver transistors achieves 12% higher gain than that obtained using a conventional amplifier. An overflow drain with a self-adjusting potential barrier can instantly remove superfluous charges in vertical-CCDs just before an exposure period, which enables DSCs to perform such functions as quick auto-focusing and dark-current removal. New dual operation modes for still and motion pictures can provide not only high-resolution color signals in a 15-frame/s 1050-line progressive mode but also wide-dynamic-range color signals in a 30-frame/s 525-line progressive mode. The latter mode employs a pixel-exchange-and-mix readout operation that helps halve the number of scanning lines with no loss in sensitivity and color information.

A 1-inch 2-M pixel HDTV CCD image sensor with tungsten photo-shield and H-CCD shunt wiring

A 1-inch 2-million pixel FIT-CCD image sensor for HDTV has been developed, which features a tungsten photo-shield and horizontal CCD (H-CCD) shunt wiring. Tungsten photo-shield, which has low reflectance and good step coverage characteristics, reduces smear level to -110 dB, combined with a frame-interline-transfer (FIT) scheme. The tungsten photo-shield also acts as a shunt busline, supplying transfer pulses to vertical CCD (V-CCD) electrodes, so that a 1.2/spl times/10/spl circ/5 electron charge handling capability is obtained at a frame transfer frequency of 1 MHz. Newly developed H-CCD shunt wiring suppresses vertical line pair FPN, even with smaller transfer pulse amplitudes. H-CCD shunt wiring also helps reduce power consumption in the H-CCD by 2/3 as compared to that achieved with conventional wiring. >

A 30 frames/s 2/3-in 1.3 M-pixel progressive scan IT-CCD image sensor

A 30 frames/s 2/3-in 1.3 M-pixel progressive scan interline-transfer charge-coupled device (IT-CCD) image sensor has been developed for video and digital still-camera applications. To obtain high frame-rate images, a 49-MHz driving horizontal CCD (H-CCD) was developed. An 8-phase drive for vertical CCDs (V-CCDs) makes it possible to operate in a variety of modes, such as 1050 line progressive scan mode and 1049 line wide dynamic range interlaced scan mode. For digital still camera use, removing residual charges stored in the V-CCDs before exposure is essential, therefore new narrow-channel barrier over-flow drain (NCB-OFD) attached under the H-CCD was developed. The NCB-OFD automatically drains out extra charges and has the advantages of requiring neither an over-flow control gate nor any additional masks.

A 30 frame/s 2/3 inch 1.3M pixel progressive scan IT-CCD image sensor

For multimedia applications, 30Frame/s 2/3 inch 1.3M pixel progressive scan interline-transfer CCD (IT-CCD) image sensor employs an optimized well for the horizontal CCD (H-CCD) and a wide bandwidth amplifier for 49 MHz operation. An 8-phase drive for vertical CCDs (V-CCDs) makes it possible to carry out a variety of operations such as 1050 line progressive mode and 1049 line wide dynamic range interlaced mode. For still camera use, removing residual charges stored in the V-CCDs before exposure is essential. A narrow-channel barrier overflow drain attached under the H-CCD automatically drains extra charge and requires neither overflow control gate nor additional masks.