Yasuaki Hokari

Stress voltage polarity dependence of thermally grown thin gate oxide wearout

Gate oxide wearout for thermally grown 57-190-A SiO/sub 2/ films in a polycrystalline silicon-SiO/sub 2/-Si structure prepared on n-type and p-type wafers was studied by examining time-dependent dielectric breakdown (TDDB) under 1-mA/cm/sup 2/ constant current with positive and negative voltages at 250 degrees C. TDDB lifetimes for positive voltage stress are more than one order longer than those for negative voltage stress. TDDB lifetimes depend on oxide thickness, that is, they increase for positive voltage stress and decreases for negative voltage stress with decreasing oxide thickness. They also depend on whether the oxide films are prepared on n-type or p-type wafers. After the positive voltage TDDB stress, negative charges are predominantly produced in the oxide layer, and the electric field at the cathode in the oxide film slightly decreases. On the contrary, after the negative voltage TDDB stress, positive charges are predominantly produced at the cathode in the oxide layer and the electric field at the cathode is built up, resulting in an increase in Fowler-Nordheim tunnel current flowing though the oxide film. >

Reliability of 6-10 nm thermal SiO 2 films showing intrinsic dielectric integrity

Time-dependent dielectric breakdown (TDDB) of thermally grown 6-10-nm SiO2films in a polysilicon/SiO2/Si structure is studied as a function of electric field (6.7-8.2 MV/cm) and temperature (170-250°C) stressings. Experiments are performed on the SiO2films with no pinholes and no weak oxide spots on dielectric breakdown histograms. TDDB occurrences are characterized by logarithmic normal distribution. The σ values (distribution variance) are found to be 1.0 and 2.0 for 6 and 10-nm SiO2films, respectively. The electric field acceleration factor and activation energy, respectively, are evaluated as 55/(MV/cm) and 1.0 eV for 6-nm films and 80/(MV/cm) and 1.1 eV for 10-nm films. Using these results, the failure rates estimated for 6-10- nm SiO2under an operating condition of 5 MV/cm at 150°C are less than 1 & 10-11/h for 6-nm films and less than 1 × 10-9/h for 10-nm films. It is concluded that 1) the 6-10-nm SiO2films with no pinholes and no weak oxide spots are highly reliable with regard to TDDB and 2) thinner (6-nm) oxide is more reliable than thick (10-nm) oxide.

Technologies to improve photo-sensitivity and reduce VOD shutter voltage for CCD image sensors

New technologies to increase the photo-sensitivity and reduce the shutter voltage of the vertical over-flow-drain (VOD) have been developed for CCD image sensors. The photo-sensitivity was increased 40% by forming an anti-reflection film over the photodiode and reducing the thickness of the p/sup +/-layer formed at the photodiode surface. The VOD shutter voltage was reduced from 31 to 18 V by using an epitaxially grown substrate with double impurity concentration layers.

A 2/3-inch 2 M-pixel IT-CCD image sensor with individual p-wells for separate V-CCD and H-CCD formation

This 2/3-inch optical-lens-format, 2 M-pixel interline-transfer (IT) CCD image sensor achieves large charge handling capability in the vertical CCD (V-CCD), and at the same time ensures sufficient transfer efficiency in the horizontal CCD (H-CCD). A V-CCD/H-CCD connection eliminates the potential barrier caused by separate V-CCD/H-CCD formation. Image sensor performance includes a 40 k-electron charge-handling capability in the V-CCD, leading to a 71 dB dynamic range, and sufficient transfer efficiency in the H-CCD, with no deterioration in V-CCD to H-CCD transfer efficiency. The power consumption is 0.49 W, just 22% of that previously achieved in a 1-inch 2 M pixel frame interline transfer (FIT) CCD. This is possible because the p-well reduces the driving pulse amplitude in the V-CCD and the IT scheme decreases electrode capacitance and driving frequency.<<ETX>>

A novel tungsten light-shield structure for high-density CCD image sensors

A novel tungsten light-shield structure has been developed. Tungsten film properties, the device configuration with the tungsten light-shield structure, and experimentally achieved results regarding device characteristics are described. Optical measurement clarified that tungsten film has a sufficiently low transmittance value for practical use for more than 200-nm-thick film and is stable up to 1000 degrees C. The good step coverage and low reflectance, such as 20-40% for aluminum, required for light-shield film were also obtained. A tungsten light-shield structure was applied to a 1/2-in format 668(H)-pixel*575(V)-pixel charge coupled-device (CCD) image sensor. An extremely low smear value, less than 0.001%, was obtained for a 300-nm film thickness. >

A symmetrical side wall (SSW)-DSA cell for a 64 Mbit flash memory

A 0.4- mu m stacked gate cell for a 64-Mb flash memory has been developed which has the symmetrical side wall diffusion self-aligned (SSW-DSA) structure. Using the proposed SSW-DSA cell with p/sup +/ pockets at both the drain and the source, an adequate punchthrough resistance to scale the gate length down to sub-half-micron has been obtained. It is also demonstrated that the uniform erasing scheme applying negative bias to the gate which is adopted for the SSW-DSA cell shows lower trapped charges after write/erase (W/E) cycles evaluated by a charge pumping technique, and results in better endurance and retention characteristics than nonuniform erasing schemes. This cell will enable the realization of a 64-Mb flash memory with single 5-V supply operation, 10/sup 6/ W/E endurance, and sector erasing scheme.<<ETX>>

Dielectric breakdown wearout limitation of thermally-grown thin-gate oxides

Gate oxide wearout on thermally grown 60–200 ASiO2 films in a polycrystalline Si (phosphorus doped)/SiO2/Si structure was studied by examining time-dependent dielectric breakdown (TDDB) under positive and negative voltage stresses. TDDB data on temperature, electric field and gate area were evaluated and wearout limitation for thin gate oxide films was estimated. TDDB lifetimes for negative voltage were 2–3 orders shorter than those for positive voltage, when compared under the same electric field. This voltage polarity dependence was enhanced with decreasing oxide thickness. When compared under the same voltage, TDDB lifetimes for negative voltage were longer than those for positive voltage, caused by taking into account the flat-band voltage and the silicon surface potential bending. It was predicted that thin oxide films were basically highly reliable for both positive and negative voltages. 60 and 100 A oxide films can be used under 3 and 5 V operating voltages, respectively, while retaining 10 year lifetimes defined by 0.01% failures.

A 1/4 inch 380 k pixel IT-CCD image sensor employing gate-assisted punchthrough read-out mode

A newly developed 1/4-inch 380 k pixel IT-CCD image sensor features a novel cell structure in which signal charges are read out from a photodiode (PD) to a vertical-CCD (V-CCD) in a gate-assisted punchthrough mode. The cell structure, fabricated through the use of high energy ion implantation technology, enables both deep PD formation and transfer-gate (TG)/channel-stop (CS) length reduction. Deep PD formation helps increase sensitivity per PD unit area, and TG/CS length reduction widens both PD and V-CCD areas. Although the cell size is small (4.8 /spl mu/m (H)/spl times/5.6 /spl mu/m (V)), the sensor achieves both high sensitivity (35 mV/lx) and a high saturation signal (600 mV). >

Reliability of thin SiO 2 films showing intrinsic dielectric integrity

The reliability of 6-10 nm SiO2films is investigated on 0.8 mm2MOS capacitors with polycrystalline silicon electrode in terms of dielectric breakdown. The SiO2films prepared show intrinsic dielectric integrity, that is, time-zero dielectric breakdown field for all capacitors distributes sharply around 10 MV/cm. Accelerated time dependent dielectric breakdown (TDDB) is examined. Electric field acceleration factor and temperature acceleration factor are evaluated. Using these factors, the failure rate for 6-10 nm SiO2is estimated to be less than1 \times 10^{-8}/hour under a 5 MV/cm at 150°C operating condition. It is concluded that the SiO2films with intrinsic time-zero dielectric breakdown behavior are highly reliable with regard to TDDB and the SiO2films as thin as 6 nm are assured to be applicable to VLSI devices.

Optical limitations to cell size reduction in IT-CCD image sensors

We have determined the practical limits of cell size reduction in interline-transfer CCD image sensors, limits resulting from diffraction occurring at the aperture above the photodiode. We have found that image cell size cannot be reduced to a level for which aperture width would fall below about 0.2 /spl mu/m. We have also found, however, that image cells with greater than 0.2 /spl mu/m aperture size are sensitive over the entire wavelength range of visible light, and that sensitivity can be increased by thinning the photoshield film.