Mohammad S. Akbar

Bias-temperature instabilities of polysilicon gate HfO/sub 2/ MOSFETs

Bias-temperature instabilities (BTI) of HfO/sub 2/ metal oxide semiconductor field effect transistors (MOSFETs) have been systematically studied for the first time. NMOS positive BTI (PBTI) exhibited a more significant V/sub t/ instability than that of PMOS negative BTI (NBTI), and limited the lifetime of HfO/sub 2/ MOSFETs. Although high-temperature forming gas annealing (HT-FGA) improved the interface quality by passivating the interfacial states with hydrogen, BTI behaviors were not strongly affected by the technique. Charge pumping measurements were extensively used to investigate the nature of the BTI degradation, and it was found that V/sub t/ degradation of NMOS PBTI was primarily caused by charge trapping in bulk HfO/sub 2/ rather than interfacial degradation. Deuterium (D/sub 2/) annealing was found to be an excellent technique to improve BTI immunity as well as to enhance the mobility of HfO/sub 2/ MOSFETs.

The electrical and material characterization of hafnium oxynitride gate dielectrics with TaN-gate electrode

Electrical and material characteristics of hafnium oxynitride (HfON) gate dielectrics have been studied in comparison with HfO/sub 2/. HfON was prepared by a deposition of HfN followed by post-deposition-anneal (PDA). By secondary ion mass spectroscopy (SIMS), incorporated nitrogen in the HfON was found to pile up at the dielectric/Si interface layer. Based on the SIMS profile, the interfacial layer (IL) composition of the HfON films appeared to be like hafnium-silicon-oxynitride (HfSiON) while the IL of the HfO/sub 2/ films seemed to be hafnium-silicate (HfSiO). HfON showed an increase of 300/spl deg/C in crystallization temperature compared to HfO/sub 2/. Dielectric constants of bulk and interface layer of HfON were 21 and 14, respectively. The dielectric constant of interfacial layer in HfON (/spl sim/14) is larger than that of HfO/sub 2/ (/spl sim/7.8). HfON dielectrics exhibit /spl sim/10/spl times/ lower leakage current (J) than HfO/sub 2/ for the same EOTs before post-metal anneal (PMA), while /spl sim/40/spl times/ lower J after PMA. The improved electrical properties of HfON over HfO/sub 2/ can be explained by the thicker physical thickness of HfON for the same equivalent oxide thickness (EOT) due to its higher dielectric constant as well as a more stable interface layer. Capacitance hysteresis (/spl Delta/V) of HfON capacitor was found to be slightly larger than that of HfO/sub 2/. Without high temperature forming gas anneal, nMOSFET with HfON gate dielectric showed a peak mobility of 71 cm/sup 2//Vsec. By high temperature forming gas anneal at 600/spl deg/C, mobility improved up to 256 cm/sup 2//Vsec.

High-performance TaN/HfSiON/Si metal-oxide-semiconductor structures prepared by NH3 post-deposition anneal

Electrical and chemical characteristics of metal-oxide semiconductor field-effect transistors (MOSFETs) prepared by low-thermal-budget (∼600 °C) NH3 post-deposition annealing of HfSiON gate dielectric have been investigated. Compared to control Hf-silicate, HfSiON showed excellent thickness scalability, low leakage current density (J), and superior thermal stability. With proper annealing-time optimization, effective oxide thickness as low as 9.2 A with J<100 mA/cm2 at gate voltage Vg=−1.5 V has been achieved. C–V hysteresis of HfSiON MOSFET was found to be small (<20 mV). Unlike NH3 surface nitridation (NH3 pre-treatment prior to Hf-silicate deposition), no degradation in Gm (transconductance), Id–Vg (drain current–gate voltage), or Id–Vd (drain current–drain voltage) characteristics has been observed.

Electrical characterization and material evaluation of zirconium oxynitride gate dielectric in TaN-gated NMOSFETs with high-temperature forming gas annealing

The electrical, material, and reliability characteristics of zirconium oxynitride (Zr-oxynitride) gate dielectrics were evaluated. The nitrogen (/spl sim/1.7%) in Zr-oxynitride was primarily located at the Zr-oxynitride/Si interface and helped to preserve the composition of the nitrogen-doped Zr-silicate interfacial layer (IL) during annealing as compared to the ZrO/sub 2/ IL - resulting in improved thermal stability of the Zr-oxynitride. In addition, the Zr-oxynitride demonstrated a higher crystallization temperature (/spl sim/600/spl deg/C) as compared to ZrO/sub 2/ (/spl sim/400/spl deg/C). Reliability characterization was performed after TaN-gated nMOSFET fabrication of Zr-oxynitride and ZrO/sub 2/ devices with equivalent oxide thickness (EOTs) of 10.3 /spl Aring/ and 13.8 /spl Aring/, respectively. Time-zero dielectric breakdown and time-dependent dielectric breakdown (TDDB) characteristics revealed higher dielectric strength and effective breakdown field for the Zr-oxynitride. High-temperature forming gas (HTFG) annealing on TaN/Zr-oxynitride nMOSFETs with an EOT of 11.6 /spl Aring/ demonstrated reduced D/sub it/, which resulted in reduced swing (69 mV/decade), reduced off-state leakage current, higher transconductance, and higher mobility. The peak mobility was increased by almost fourfold from 97 cm/sup 2//V/spl middot/s to 383 cm/sup 2//V/spl middot/s after 600/spl deg/C HTFG annealing.

Optimized NH/sub 3/ annealing Process for high-quality HfSiON gate oxide

Optimization of fabrication process in obtaining high-quality HfSiON gate-oxide metal-oxide semiconductor field-effect transistors (MOSFETs) by NH/sub 3/ post-deposition anneal (PDA) has been performed. At 600/spl deg/C anneal temperature, a longer anneal duration resulted in reduced leakage current density (J), reduced trapped charges, and lower hysteresis in capacitance-voltage curves, but with a slight increase in effective oxide thickness (EOT). Subsequent interfacial layer growth with longer anneal duration was attributed to the increase in EOT. MOSFET, fabricated by the optimized process of 600/spl deg/C, 40 s NH/sub 3/ PDA, showed superior I/sub d/--V/sub d/ (drain current-drain voltage) and charge-trapping characteristics as compared to control Hf-Silicate.

Thickness dependence of Weibull slopes of HfO 2 gate dielectrics

Breakdown voltage distribution, Weibull slopes, and area scaling factors have been investigated for HfO/sub 2/ gate dielectrics in order to gain a better understanding of the breakdown mechanism. Weibull slope of thick HfO/sub 2/ (e.g., /spl beta//spl ap/4 for EOT=2.5 nm) is smaller than that of SiO/sub 2/ with similar physical thickness, whereas /spl beta/ of the thinner HfO/sub 2/ (e.g., /spl beta//spl ap/2 for EOT=1.4 nm) is similar to that of SiO/sub 2/. The implication of the thickness dependence of /spl beta/ is discussed.

Improved electrical and material characteristics of hafnium titanate multi-metal oxide n-MOSFETs with ultra-thin EOT (/spl sim/8 /spl Aring/) gate dielectric application

A novel approach of fabricating laminated TiO/sub 2//HfO/sub 2/ bi-layer multi-metal oxide dielectric was developed for high performance CMOS applications. Both layers showed negligible intermixing and no silicide formation. For the first time, ultra-thin EOT (/spl sim/8 /spl Aring/) was achieved with increased effective permittivity (k /spl sim/ 36) using the bi-layer dielectric. Leakage current characteristic was slightly higher than HfO/sub 2/ due to lower band offset of TiO/sub 2/. However, superior thermal stability (>950/spl deg/C), significantly reduced hysteresis characteristic, and comparable interface state density represent the high quality of TiO/sub 2//HfO/sub 2/ multi-metal oxide. Also, excellent subthreshold swing, increased transconductance, higher current drive, and -33% improved channel electron mobility compared to the control HfO/sub 2/ samples demonstrate the feasibility of new multi-metal oxide application for future CMOS technology.

Effects of varying interfacial oxide and high-k layer thicknesses for HfO2 metal–oxide–semiconductor field effect transistor

A metal–oxide–semiconductor capacitor and field effect transistor with a hafnium oxide (HfO2) dielectric have been fabricated. Various thicknesses of interfacial oxide and HfO2 film have been used. The results show that the flatband voltage changed due to the change in the physical thickness of the HfO2 film, and not that of the interfacial oxide layer. In addition, the effective channel electron mobility depends on both the amount of fixed charges and the distance from the fixed charges to the Si surface. The results also suggest that the fixed charges are rather uniformly distributed throughout the bulk of high-k layer.

Nickel-silicide phase effects on flatband voltage shift and equivalent oxide thickness decrease of hafnium silicon oxynitride metal-silicon-oxide capacitors

This Letter reports the nickel-silicide phase effects on the electrical characteristics of high-k and silicon dioxide (SiO2) metal-oxide-semiconductor devices. It was found that the silicon-deficient nickel-silicided gate electrode on the hafnium silicon oxynitride (HfSiON) led to a positive flatband voltage (Vfb) shift and a reduction in the equivalent oxide thickness (EOT). However, negligible Vfb shift and EOT decrease were observed in the case of control hafnium oxide and SiO2 structures. It was believed that Si dissociation from the HfSiON layer was the main reason for the positive Vfb shift and the EOT decrease.

Improved electrical and material characteristics of HfTaO gate dielectrics with high crystallization temperature

N-type metal-oxide-semiconductor field-effect transistors (N-MOSFETs) using HfTaO with varying Ta composition (20%, 30%, 40%, and 50%) have been fabricated and characterized. Crystallization temperatures of HfTaO with varying Ta composition were also measured. It was found that HfTaO with 40% Ta exhibited the highest crystallization temperature of 900 °C, while 35% and 52% HfTaO showed crystallization temperature of 800 °C. The results demonstrate that HfTaO N-MOSFETs exhibit higher electron mobility than controlled HfO2 devices. Among them, the transistor with 40% Ta shows the highest electron mobility.