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300mm FinFET results utilizing conformal, damage free, ultra shallow junctions (X j ∼5nm) formed with molecular monolayer doping technique

We demonstrate for the first time, a 20nm FinFET using a new, conformal, and damage-free monolayer doping technique. Unlike conventional ion-implantation, this approach makes use of a dopant-containing precursor to uniformly assemble a monolayer of covalently bonded dopants to enable an ultra-shallow (Xj∼5nm) and abrupt (0.6nm/dec) junction formation around a high aspect ratio fin structure, which overcomes the possible FinFET pitch scaling limitations of traditional doping techniques. FinFETs featuring MLD junctions were successfully demonstrated with good electrostatics control down to a gate length of ∼40nm. With further scaling of the fin width, sub-threshold swing and threshold voltage roll-off can be further improved. This low damage and conformal doping is a promising technique to address key FinFET scaling issues associated with parasitic series resistance and short channel control for the 15nm node and beyond.

Strained SiGe and Si FinFETs for high performance logic with SiGe/Si stack on SOI

In this work, we report high performance (I<inf>on</inf> ∼1 mA/µm at Ioff 100nA/µm @ 1V Vcc) short channel p-type SiGe/Si FinFETs combining high mobility, low T<inf>inv</inf> (scaled High-k w/o Si cap), low R<inf>sd</inf>, and process-induced strain. A dual channel scheme for high mobility CMOS FinFETs is demonstrated.

Impact of Fin Doping and Gate Stack on FinFET (110) and (100) Electron and Hole Mobilities

Double-gate FinFET (110) (110) and (100) (100} electron mobility (μ_e) and hole mobility (μ_h) are experimentally investigated for the following: 1) a wide range of boron and phosphorus fin doping concentrations and 2) a wide variety of gate stacks combining HfO₂, SiO₂, or SiON insulators with TiN or poly-Si electrodes. It is found out that, irrespective of fin doping and gate stack, (110) (110) μ_e is competitive with the (100)(100) μ_e, while (110)(110) μ_h is ≥ 2× higher than (100) (100) μ_h. Inversion μ_e and μ_h are independent of doping as long as the effective field/doping combination enables the screening of the depletion charge. Mobility degradation with doping is significantly lower in accumulation mode (AM) than in inversion mode (IM) such that, for heavily B-doped fins, AM hole mobility exceeds the IM electron mobility even in (100) FinFETs. In undoped fins, ALD TiN gate stress is observed to improve μ_e for both orientations without degrading μ_h.

Effective Modulation of Ni Silicide Schottky Barrier Height Using Chlorine Ion Implantation and Segregation

Using a presilicide implantation approach, we demonstrate that the Schottky barrier height (SBH) of NiSi/n-Si(100) can be modulated by doping a Si substrate with a halogen species such as chlorine. Activation energy measurements indicate that an ultralow barrier of 0.08 eV for NiS/n-Si can be achieved when a high dose (~1 times 1015 cm2) of chlorine is implanted prior to Ni silicidation. A secondary ion mass spectroscopy analysis on the presilicide Cl-implanted NiSi shows chlorine segregates at the interface with SBH tuning from 0.68 to 0.08 eV on n-Si and a corresponding increase in hole SBH on p-Si(100). The presilicide Cl-implanted NiSi film also demonstrates an enhanced thermal stability with a low sheet resistively of < 28 muOmega even up to 850degC.

Enhanced performance in SOI FinFETs with low series resistance by aluminum implant as a solution beyond 22nm node

We present an approach to scale Rext while maintaining control of short channel effects in scaled finFETs. For FETs with fins <20nm, an enhancement of 19% in drain current was achieved in nFETs by incorporating Al at silicide-Si interface. This Al implantation while reducing the schottky barrier height for n-Si contact by 0.4 eV, does not degrade the integrity of the junction extensions or gate stacks. These attributes constitute a simple non-planar cMOS integration sequence for enhancing future high performance technology nodes.

SiGe CMOS on (110) channel orientation with mobility boosters : Surface orientation, channel directions, and uniaxial strain

We report a comprehensive study of surface orientation, channel direction, and uniaxial strain technologies for SiGe channels CMOS. On a (110) surface, SiGe nMOS demonstrates a higher electron mobility than Si (110) nMOS. The hole mobility of SiGe pMOS is greater on a (110) surface than on a (100) surface. Both electron and hole mobility on SiGe (110) surfaces are further enhanced in a <110> channel direction with appropriate uniaxial channel strain. Results obtained in this work advance the integration technique of high mobility CMOS on a single SiGe (110)<110> channel orientation to enhance overall performance without the process complexity associated with hybrid channel CMOS approaches.

Performance and variability in multi-V T FinFETs using fin doping

The impact of fin doping (B, P, As) on FinFET device parameters is studied for high-K/midgap metal gate SOI FinFETs. For a fin width of ~25 nm, >;1 V VT modulation is demonstrated from accumulation mode (AM) to inversion mode (IM). IM FinFETs improve short channel FinFET electrostatics, on-off ratio, and VT variability compared to their undoped counterparts. The same parameters degrade in accumulation mode FinFETs. A VT modulation of ±0.25 V using fin B and P doping comes at the expense of 24% and 14% high field mobility penalty for NFET and PFET, respectively. For the same dose, Arsenic is found to modulate the VT more effectively than does Phosphorus. Basic modeling results show that for aggressively scaled (5 nm-wide) fins, the impact of single dopant atom on VT can be as high as 25 mV, severely challenging the viability of the technique towards the end of roadmap.

Application of inline high resolution x-ray diffraction in monitoring Si/SiGe and conventional Si in SOI fin-shaped field effect transistor processes

This study investigates the application of inline high resolution x-ray diffraction (HRXRD) for process control of Si/SiGe and conventional Si on silicon-on-insulator (SOI) fin-shaped field effect transistors (FinFETs). HRXRD measurements were taken from test pads on production wafers; the process stages under study were pre- and post-fin etch. For the pre-etch stage, HRXRD monitors the Si or Si/Ge thickness, Ge concentration (%), and crystal quality. For thickness, HRXRD results matched the fin height from a corresponding device within 2 A. When equipped with a 1D detector, the typical measurement time can be as short as 20 min. In the post-etch stage, HRXRD monitors fin pitch with a precision of 3 nm. The choice of diffraction plane has an impact on the signal-to-noise ratio. In particular, the asymmetric 113 reciprocal space map (RSM) has better signal-to-noise than 004 for monitoring Si fins; however, pitch data obtained from these two diffraction planes matches within the measurement precision. The e...

Conformal, low-damage shallow junction technology (Xj∼5nm) with optimized contacts for FinFETs as a Solution Beyond 14nm Node

A new conformal and damage free doping technique (monolayer doping, MLD) has been demonstrated on FinFETs with good control of short channel effects down to a gate length of ~40nm and 20nm of Wfin. Unlike conventional ion-implantation, this approach makes use of a dopant-containing precursor to uniformly assemble a monolayer of covalently bonded dopants to enable ultra-shallow junction (USJ) of ~5nm, showing great potential for FinFET junction scaling. This low damage, conformal doping technique is promising to address key FinFET scaling issues: series resistance and short channel control for 14nm node and beyond. A sub-5nm junction depth with a steep junction abruptness has been successfully achieved on 300mm platform.

Hole mobility enhancement in uniaxially strained SiGe FINFETs: Analysis and prospects

Experimental and theoretical hole mobility study in uniaxially strained (110)&#60;110> Si0.75Ge0.25 pFINFETs shows that alloy scattering contributes only a small fraction of the overall mobility at 300K but plays a bigger role limiting 77K hole mobility. Increasing the Ge content to 50% increases the strain level. However, the extent of strain relaxation depends on the length of the fin. Fig. 10 shows the measured and projected hole mobility for SiGe FINFETs with 25% and 50% Ge mole fraction. Higher strain induced reduction of effective mass compensates for the increased interface charge density, Dit, in SSGOI0.5 pFINFET and alloy disorder and results in 157% increase in the hole mobility observed at Ns=1×1013 cm−2 and T=300K. Fig. 11 benchmarks the hole mobility in SSGOI0.25 and SSGOI0.5 pFINFETs as a function of electrical oxide thickness (TOXE) and shows its advantage over relaxed Ge channel MOSFETs. However strain relaxation for shorter length fins need to be addressed using careful layout techniques. High mobility combined with excellent short channel behavior make these devices a promising candidate for future technology node.