Nae Yoneda
Hitachi
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Featured researches published by Nae Yoneda.
ASME 2007 InterPACK Conference collocated with the ASME/JSME 2007 Thermal Engineering Heat Transfer Summer Conference | 2007
Kisho Ashida; Akira Muto; Ichio Shimizu; Kenya Kawano; Naotaka Tanaka; Nae Yoneda
We developed a new packaging technology, one that uses double-sided cooling to dramatically reduce the on-resistance and thermal resistance. The main features of this technology are as follows. Both sides of the chip are soldered to copper leadframes. After that, copper leadframes soldered to the top and bottom of the chip are exposed when transfer molding encapsulates the package. There were two development problems with packaging technology. The first is how to prevent chip crack in the reflow process. The second is how to improve the fatigue life of solder during the temperature cycling. To solve these problems, we designed our package structure using an experimental design method. In particular, for the second problem, we quantitatively calculated the amount of solder fatigue fracture and the number of cycles using the solder crack propagation analysis method, because the performance of the package depends on the amount of solder fatigue fracture. As a result, we could create a condition that prevented chip crack and improved the fatigue life of solder by the twice compared to the first prototype and determined the optimum structure. We assembled a new package based on this optimum structure, and confirmed this improvement of the reliability. In addition, we measured the on-resistance and thermal resistance of this package and that of the existing package available. We found that the new package’s on-resistance and thermal resistance decreased to about 70 and 80% that of the existing package respectively.Copyright
electronic components and technology conference | 1999
Nae Yoneda; Makoto Kitano; Hideo Miura; Ichio Shimizu; Nobuya Koike
A program practical that enables design engineers to simply design thermal resistance of IC packages has been developed. Template solid models of IC packages and an automatic system for determining heat transfer coefficient are included in the program. The program does not require the design engineers to have a special knowledge of thermal analysis, and it runs on a personal computer with a 200-MHz PowerPC 604 using 13 MB of RAM. It takes only about 10 seconds to calculate thermal resistance of a quad flat package (QFP) mounted on a printed circuit board (PCB). The error between the calculated and measured values was confirmed to be within about /spl plusmn/20% by 144-case investigations. A thermally enhanced QFP with a heat spreader (JEDEC code: MO-204) has been developed using this program.
Heat Transfer - Japanese Research | 1996
Nae Yoneda; Makoto Kitano; Ichio Shimizu
As a result of recent progress in electronic equipment and devices, the power dissipation of LSI chips has tended to increase. Therefore, it has become more important to improve their heat transfer characteristic. Methods already used to enhance heat transfer in manufactured packages involve adding a heatspreader or using heat radiating lead-frames. In this paper, we propose two kinds of thermally improved packaging designs. One has molded plastic fins on the top of the surface. The other has lead-frame fins that extend from the heat radiation lead-frames. We designed these thermal structures using a previously reported thermal resistance analysis of LSI packages, and then built trial models and measured their thermal resistance by suspending them in a wind tunnel. According to the measurements, the thermal resistance of the package with plastic fins is about 34 percent lower than that of a fin-less package, and the resistance of the package with lead-frame fins is about 20 percent lower than that of a package with only radiation leads.
Journal of The Japan Society for Precision Engineering | 1992
Tetsuo Kumazawa; Nae Yoneda; Makoto Shimaoka; Atsushi Sasayama
An optical axis determination method for semiconductor laser systems of invisible wave length, e. g. 1.3, 1.5 μm, has been proposed. A semiconductor laser module with a microlens shaped by the surface tension of melted glass is discussed. The optical axis of the system is determined as follows. At first, the axis of the lens is searched from interference fringes made by reflecting He-Ne laser visible light. This axis is then used as the reference axis. Next, the electromotive current in the semiconductor laser is measured by illuminating the semiconductor laser with a He-Ne laser light from the opposite direction against the laser emission. At the same time, the angle of the illuminating laser light is continuously changed by means of an f·θ lens. The illuminating laser light axis which corresponds to the desired optical axis is found when the maximum electromotive current is obtained. The spacial orientated axis is determined by independently measuring the maximum currents along two directions orthogonal to each other.
Archive | 1994
Makoto Kitano; Asao Nishimura; Akihiro Yaguchi; Nae Yoneda; Ryuji Kohno; Naotaka Tanaka; Tetsuo Kumazawa
Archive | 1991
Ryuji Kohno; Asao Nishimura; Makoto Kitano; Akihiro Yaguchi; Nae Yoneda
Archive | 1995
Tetsuo Kumazawa; Makoto Kitano; Akihiro Yaguchi; Ryuji Kohno; Naotaka Tanaka; Nae Yoneda; Ichiro Anjoh
Archive | 1997
Shigeharu Tsunoda; Junichi Saeki; Isamu Yoshida; Kazuya Ooji; Michiharu Honda; Makoto Kitano; Nae Yoneda; Shuji Eguchi; Kunihiko Nishi; Ichiro Anjoh; Kenichi Otsuka
Archive | 1993
Akihiro Yaguchi; Asao Nishimura; Makoto Kitano; Ryuji Kohno; Nae Yoneda; Ichiro Anjoh; Gen Murakami
Archive | 1991
Asao Nishimura; Makoto Kitano; Akihiro Yaguchi; Nae Yoneda; Ryuji Kohno; Gen Murakami; Ichiro Anjoh