Norio Koike
Hitachi
Network
Latest external collaboration on country level. Dive into details by clicking on the dots.
Publication
Featured researches published by Norio Koike.
Applied Physics Letters | 1990
Yoshiyuki Kaneko; Norio Koike; Ken Tsutsui; Toshihisa Tsukada
An amorphous silicon field‐effect phototransistor is fabricated using a processing technology compatible with conventional amorphous silicon‐silicon nitride thin‐film transistors. The phototransistor has an offset structure between the source and gate electrodes, where light is absorbed to produce a photocurrent. In an electron accumulation mode, the photocurrent is greater than the dark current by three orders of magnitude. In addition, the phototransistor is found to have output characteristics showing good saturation. Typical photoconductive gain of this saturation current is 17.
IEEE Transactions on Electron Devices | 1980
Norio Koike; I. Takemoto; K. Satoh; S. Hanamura; S. Nagahara; Masaharu Kubo
The design consideration and performance of an n-p-n structure 484 × 384 element MOS imager is described. The imager has a photodiode array and scanners separately integrated on different p wells. The horizontal scanner, consisting of bootstrapping type noninverting circuits, features high speed and low noise. The maximum scan rate of the scanner is ∼15 MHz. The vertical scanner, consisting of inverting circuits, has a wide dynamic operating range. It can operate stably under an intense illumination of ∼ 1500 1x. Analysis of the MOS switch with a photodiode is also carried out. The 484 × 384 imager has shown excellent performances: signal to fixed-pattern-noise ratio of 54 dB, horizontal resolution of 260 TV lines, vertical resolution of 350 TV lines, well-balanced spectral response, and antiblooming.
international solid-state circuits conference | 1979
Norio Koike; I. Takemoto; K. Sato; H. Matsumaru; Mikio Ashikawa; Masaharu Kubo
An MOS imager featuring an NPN structure for anti blooming and built-in double video lines for color signal pickup will be described. Imager is used in single-chip color camera with TV resolution.
IEEE Transactions on Electron Devices | 1985
Norio Koike; T. Nakano; Akira Sasano; Y. Taniguchi; I. Takemoto; T. Fujita
Reliability of an MOS-type color imaging device, fabricated by on-wafer color filter processing, was evaluated. The tests include impurity analysis, heat and light resistance, spectral response variation, and other characteristics. All the results obtained show that on-wafer processing can be applied to the production of the imager and assures a long operational life.
international solid-state circuits conference | 1973
Mikio Ashikawa; Norio Koike; T. Kamiyama; S. Kubo
A linear photosensor array having a high S/N ratio (more than 35 dB) with excellent resolution capability has been developed, using a neighboring bit correlation principle technique.
international solid-state circuits conference | 1975
Norio Koike; Mikio Ashikawa; T. Kamiyama; M. Ozawa
This paper will disclose a clock pulseless scanner, using the delay time inherent in the MOS inverter. A scan rate of 40 MHz/bit, with spike noise-free operation, has been verified by an experimentally-made linear MOS image sensor.
Archive | 1982
Akira Sasano; Toshio Nakano; Ken Tsutsui; Michiaki Hashimoto; Tadao Kaneko; Norio Koike; Akiya Izumi
Archive | 1985
Norio Koike; Masaaki Nakai; Kenji Itoh; Toshiyuki Akiyama; Iwao Takemoto; Shinya Oba
Archive | 1991
Toshihisa Tsukada; Yoshiyuki Kaneko; Hideaki Yamamoto; Norio Koike; Ken Tsutsui; Haruo Matsumaru; Yasuo Tanaka
Archive | 1983
Norio Koike; Shinya Ohba; Toshiaki Masuhara