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Featured researches published by O. Winkler.


Microelectronic Engineering | 2002

Concept of floating-dot memory transistors on silicon-on-insulator substrate

O. Winkler; F. Merget; M Heuser; B. Hadam; M. Baus; B. Spangenberg; H. Kurz

Abstract Two different concepts of floating-dot memories are compared. In addition to the well known concept of nanodots in SiO 2 -environments a novel architecture where oxidized floating nanodots are embedded directly in a gate material is investigated.


Microelectronic Engineering | 2003

Influence of channel width on n - and p -type nano-wire-MOSFETs on silicon on insulator substrate

Max C. Lemme; T. Mollenhauer; Wolfgang Henschel; Thorsten Wahlbrink; M Heuser; M. Baus; O. Winkler; B. Spangenberg; Ralf Granzner; Frank Schwierz; H. Kurz

The fabrication and characterization of nanoscale n- and p-type multi-wire metal-oxide semiconductor field effect transistors (MOSFETs) with a triple gate stracture on silicon-on-insulator material (SOI) is described in this paper. Experimental results are compared to simulation with special emphasis on the influence of channel width on the subthreshold behavior. Experiment and simulation show that the threshold voltage depends strongly on the wire width at dimensions below 100 nm. It is further shown that the transition from partial to full channel depletion is dependent on channel geometry. Finally, an increased on-current per chip area is demonstrated for triple-gate SOI MOSFETs compared to planar SOI devices.


european solid-state device research conference | 2003

Subthreshold characteristics of p-type triple-gate MOSFETs

Max C. Lemme; T. Mollenhauer; W. Henschel; Thorsten Wahlbrink; H. D. B. Gottlob; J. K. Efavi; M. Baus; O. Winkler; B. Spangenberg; H. Kurz

The fabrication and characterization of triple-gate p-type metal-oxide semiconductor field effect transistors (p-MOSFETs) on SOI material with multiple channels is described. To demonstrate the beneficial effects of the triple-gate structure on scaling, the output and transfer characteristics of 70 nm printed gate length pMOSFETs with 22 nm MESA width are presented. The geometrical influence of triple-gate MESA width on subthreshold behavior is investigated in short- and long channel devices. The temperature dependence of subthreshold characteristics is discussed.


european solid state device research conference | 2005

Monolithic bidirectional switch (MBS) - a novel MOS-based power device

M. Baus; M Z Ali; O. Winkler; B. Spangenberg; Max C. Lemme; H. Kurz

A novel MOS-based power device, the monolithic bidirectional switch (MBS), is investigated in this work. An analytical model is used to explain basic device operating principles. A self-aligned fabrication process of lateral MBS devices with Schottky contacts and local oxidation of silicon technique (LOCOS) is described. Experimental results are compared with the analytical model to analyze the influence of device parasitics. Bidirectional switching and an on/off-current ratio of more than 100 is demonstrated for MBS devices for the first time.


Microelectronics Reliability | 2007

Charge accumulation in the dielectric of the nanocluster NVM MOS structures under anti- and unipolar W/E window formation

V. I. Turchanikov; A. N. Nazarov; V. S. Lysenko; V. Ostahov; O. Winkler; B. Spangenberg; H. Kurz

This paper focuses on the detailed study of the unipolar recharging phenomenon of the nanocluster NVM cells based upon the electron emission from the nanodots and their subsequent neutralization. It is shown that electron emission from nanodots is a very fast and effective process with a time constant <5 ms, but the subsequent neutralization of the positive accumulated charge is strongly dependent on the excess of Si atoms stored in the nanodots.


Biennial Meeting of the Federation-of-European-Materials-Societies. Lausanne, SWITZERLAND. 2003 | 2005

Floating-dot Memory Transistors on SOI Substrate

O. Winkler; M. Baus; Max C. Lemme; R. Rolver; B. Spangenberg; H. Kurz

Non-volatile memories have become an indispensable part of today’s digital data processing. The quickly growing mobile electronics market especially fuels the demand for these devices. The presented floating-dot memory concept discloses a related and CMOS-compatible alternative with enhanced write/erase endurance compared to FLASH while not demanding severe changes of the manufacturing process at the same time. Here, the charge-storing silicon nano-dots are deposited by a self-organized LPCVD technique. The introduced concept is based on advanced SOI substrates, which exhibit fabrication as well as device advantages and offer higher scaling potential than conventional bulk silicon substrates. The electrical data of the presented examination devices prove the suitability of the floatingdot memory concept and pave the way for enhanced non-volatile memory devices.


Solid-state Electronics | 2004

Subthreshold behavior of triple-gate MOSFETs on SOI material

Max C. Lemme; T. Mollenhauer; Wolfgang Henschel; Thorsten Wahlbrink; M. Baus; O. Winkler; Ralf Granzner; Frank Schwierz; B. Spangenberg; H. Kurz


Microelectronic Engineering | 2006

High-density silicon nanowire growth from self-assembled Au nanoparticles

J. Albuschies; M. Baus; O. Winkler; B. Hadam; B. Spangenberg; H. Kurz


Microelectronics Reliability | 2005

Light emission from Si/SiO2 superlattices fabricated by RPECVD

R. Rölver; O. Winkler; Michael Först; B. Spangenberg; H. Kurz


Microelectronic Engineering | 2004

Floating nano-dot MOS capacitor memory arrays without cell transistors

O. Winkler; M. Baus; B. Spangenberg; H. Kurz

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H. Kurz

RWTH Aachen University

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M. Baus

RWTH Aachen University

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B. Hadam

RWTH Aachen University

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Frank Schwierz

Technische Universität Ilmenau

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M Heuser

RWTH Aachen University

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Ralf Granzner

Technische Universität Ilmenau

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