Panglijen Candra

A 0.35 μm SiGe BiCMOS technology for power amplifier applications

In this paper we introduce, a state-of-the-art SiGe BiCMOS power amplifier technology that features two NPNs with 40 GHz / 6.0 V & 27 GHz / 8.5 V (fT - BVceo) respectively, a novel low inductance metal ground through-silicon-via (TSV), integrated on a low-cost 0.35 μm lithography node with 3.3 V / 5.0 V dual-gate CMOS technology and high-quality passives on a 50 Ω.cm substrate.

A cost-competitive high performance Junction-FET (JFET) in CMOS process for RF & analog applications

in this paper, we present a cost-effective JFET integrated in 0.18µm RFCMOS process. The design is highly compatible with standard CMOS process, therefore can be easily scaled and implemented in advanced technology nodes. The design impact on Ron and Voff is further discussed, providing the insights and guidelines for JFET optimization. Besides the superior flicker noise (1/f noise) characteristics, this JFET device also demonstrates promising RF characteristics such as maximum frequency, linearity, power handling capability, power-added efficiency, indicating a good candidate for RF designs.

Device and circuit performance of SiGe HBTs in 130nm BiCMOS process with f T /f MAX of 250/330GHz

A high performance (HP) SiGe HBT in IBMs 130nm SiGe BiCMOS8XP technology demonstrating peak fT/fMAX of 250/330GHz is reported for mm-wave and high performance RF/analog applications. The HBT has been developed as an optional device within the existing IBM 130nm SiGe BiCMOS8HP technology which includes a full suite of 130nm RFCMOS FETs, passives and mm-wave distributive passive devices. CML ring oscillators fabricated using HP HBTs in 8XP demonstrate 16% lower delay per stage than 8HP. A VCO design in 8XP has 40% lower phase noise at 36GHz compared to an identical design in 8HP. LNA and PA designs in 8XP show 6dB and 3dB higher gain respectively at 94GHz.

SiGe HBT NPN device optimization for RF power amplifier applications

This paper describes the optimization of Silicon Germanium (SiGe) NPN bipolar transistors for power amplifier performance. Minimizing the collector resistance and barrier effects in a power device are important to optimize the RF characteristics. Overall, we demonstrate that by optimizing the Ge retrograde design, one can improve the large signal performance to provide 66.5% Power-Added-Efficiency (PAE) at an output power of 15.4dBm, with 14.1 dB of peak Gain (Gp) and 14.1 dBm P1dB, without degrading BVceo.

A 0.24 μm SiGe BiCMOS technology featuring 6.5V CMOS, f T /f MAX of 15/14 GHz VPNP, and f T /f MAX of 60/125 GHz HBT

For the first time, we report a 0.24 mum SiGe BiCMOS technology that offers full suite of active device including three distinct NPNs, a vertical PNP, CMOS supporting three different operating-voltages, and wide range of passive devices. In particular, this technology provides 6.5 V CMOS capability and VPNP with fT/fMAX of 15/14 GHz and BVCEO of 6.5 V which can be used to complement high breakdown NPN with fT of 30 GHz and BVceo of 6.0 V.