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Dive into the research topics where Patrick Reynaud is active.

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Featured researches published by Patrick Reynaud.


international soi conference | 2009

SOI substrate readiness for 22/20 nm and for fully depleted planar device architectures

Daniel Delprat; François Boedt; Carole David; Patrick Reynaud; Aziz Alami-Idrissi; Didier Landru; Christophe Girard; Christophe Maleville

Fully depleted (FD) MOSFET architecture for sub-32 nm technology node requires a new SOI substrate fabrication to meet all the stringent specifications imposed by a FD device. Ultra Thin SOI (UTSOI) targets planar device architectures, stressing specifications for thickness uniformity. Also Ultra Thin Burried Oxyde (UTBOx) offers additional benefits such as the application of back bias, for example enhancing device stability or threshold voltage tuning. In this paper, we discuss the Smart CutTM technology capability for both UTSOI and UTBOx substrate design with the quality and specifications that meet the future FD technology requirements.


european solid-state device research conference | 2014

Superior performance and Hot Carrier reliability of Strained FDSOI nMOSFETs for advanced CMOS technology nodes

G. Besnard; X. Garros; F. Andrieu; P. Nguyen; W. Van Den Daele; Patrick Reynaud; Walter Schwarzenbach; Daniel Delprat; Konstantin Bourdelle; Gilles Reimbold; S. Cristoloveanu

The Hot Carrier (HC) reliability of NMOS transistors fabricated on biaxially tensile-strain SOI substrates (sSOI) is compared to that of devices fabricated on standard unstrained SOI substrates. It is shown that sSOI-based devices not only exhibit a 10% higher performance in term of ION/IOFF but also show superior HC reliability at same drive current. This reliability improvement may be explained by a better interface quality for sSOI films.


Archive | 2006

Methods for manufacturing compound-material wafers and for recycling used donor substrates

Daniel Delprat; Eric Neyret; Oleg Kononchuk; Patrick Reynaud; Michael Stinco


Archive | 2006

Method of revealing crystalline defects in a bulk substrate

Patrick Reynaud; Oleg Kononchuk; Christophe Maleville


Archive | 2012

METHOD FOR MANUFACTURING A SEMICONDUCTOR-ON-INSULATOR STRUCTURE HAVING LOW ELECTRICAL LOSSES, AND CORRESPONDING STRUCTURE

Patrick Reynaud; Sébastien Kerdiles; Daniel Delprat


Archive | 2006

Method for fabricating a compound-material and method for choosing a wafer

Ludovic Ecarnot; Willy Michel; Patrick Reynaud; Walter Schwarzenbach


Archive | 2007

Method for manufacturing compound material wafers and corresponding compound material wafer

Patrick Reynaud; Oleg Kononchuk


Archive | 2012

Method for measuring defects in a silicon substrate

Patrick Reynaud; Chirstophe Gourdel


Archive | 2010

PROCEDE DE FABRICATION D'UNE STRUCTURE DE TYPE SEMI-CONDUCTEUR SUR ISOLANT, A PERTES ELECTRIQUES DIMINUEES ET STRUCTURE CORRESPONDANTE

Patrick Reynaud; Sébastien Kerdiles; Daniel Delprat


Archive | 2010

Method to thin a silicon-on-insulator substrate

Patrick Reynaud; Ludovic Ecarnot; Khalid Radouane

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