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Dive into the research topics where Ludovic Ecarnot is active.

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Featured researches published by Ludovic Ecarnot.


ieee soi 3d subthreshold microelectronics technology unified conference | 2015

300 mm InGaAsOI substrate fabrication using the Smart Cut TM technology

S. Sollier; J. Widiez; Gweltaz Gaudin; F. Mazen; T. Baron; M. Martin; M C. Roure; P. Besson; C. Morales; E. Beche; F. Fournel; S. Favier; A. Salaun; P. Gergaud; M. Cordeau; Christelle Veytizou; Ludovic Ecarnot; Daniel Delprat; Ionut Radu; T. Signamarcheix

In this work we demonstrate for the first time 300 mm InGaAs on Insulator (InGaAs-OI) substrates. A 30 nm thick InGaAs layer was successfully transferred using low temperature Direct Wafer Bonding (DWB) and the Smart CutTM technology. The epitaxial growing process has been optimized to reduce the surface roughness of the InGaAs film at around 1.5 nm RMS. HR-XRD characterization on the transferred InGaAs layer indicates that the layer remains crystalline.


Materials Science Forum | 2008

High Temperature RTP Application in SOI Manufacturing

Christophe Maleville; Eric Neyret; Daniel Delprat; Ludovic Ecarnot

Significant performance enhancements are offered by silicon on insulator (SOI) or strained silicon, SOI being adopted for advanced devices in sustaining Moore’s law. Sub-45 nm device options are including fully depleted (FD) devices, that are stressing even more specifications for thickness uniformity. Nano-uniformity, considering thickness variation contributions from device level to wafer scale, has been introduced in substrate optimization and latest Unibond products are verifying FD requirements. Rapid Thermal Processing (RTP) based surface smoothing has been introduced in Unibond processing to combine thickness control and product quality requirements.


Archive | 2003

Method for reducing free surface roughness of a semiconductor wafer

Eric Neyret; Ludovic Ecarnot


Archive | 2002

Method for reducing surface rugosity of a semiconductor slice

Eric Neyret; Ludovic Ecarnot


Archive | 2005

Method of reducing the surface roughness of a semiconductor wafer

Eric Neyret; Ludovic Ecarnot; Emmanuel Arene


Archive | 2006

Method for fabricating a compound-material and method for choosing a wafer

Ludovic Ecarnot; Willy Michel; Patrick Reynaud; Walter Schwarzenbach


Handbook of Cleaning in Semiconductor Manufacturing: Fundamental and Applications | 2011

Direct Wafer Bonding Surface Conditioning

Hubert Moriceau; Yannick Le Tiec; Frank Fournel; Ludovic Ecarnot; Sébastien Kerdiles; Daniel Delprat; Christophe Maleville


Archive | 2010

Method to thin a silicon-on-insulator substrate

Patrick Reynaud; Ludovic Ecarnot; Khalid Radouane


Archive | 2003

Method for minimizing slip line faults on a semiconductor wafer surface

Eric Neyret; Christophe Maleville; Ludovic Ecarnot


Archive | 2010

Finishing method for a substrate of "silicon-on-insulator" soi type

Walter Schwarzenbach; Sébastien Kerdiles; Patrick Reynaud; Ludovic Ecarnot; Eric Neyret

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