Patrick Schmid

Modelling of 4H-SiC VJFETs with Self-Aligned Contacts

Purely vertical 4H-SiC JFETs have been modeled by using three different approaches: the analytical model, the finite element model and the compact model. The results of the modeling have been compared with experimental results on a series of fabricated self-aligned devices with two different channel lengths (0.3 and 1.1μm) and various channel widths (1.5, 2, 2.5, 3, 4 and 5 μm). For all the considered models I-V and C-V characteristics could be satisfactorily simulated.

Impact of substrate steps and of monolayer-bilayer junctions on the electronic transport in epitaxial graphene on 4H-SiC (0001)

Two dimensional maps of the electronic conductance in epitaxial graphene (EG) grown on SiC were obtained by conductive atomic force microscopy (CAFM). The correlation between morphological and electrical maps revealed the local conductance degradation in EG over the SiC substrate steps or at the junction between monolayer (1L) and bilayer (2L) graphene regions. The effect of steps strongly depends on the charge transfer phenomena between the step sidewall and graphene, whereas the resistance increase at 1L/2L junction is a purely quantum mechanical effect, due to the weak coupling between 1L and 2L electron wavefunctions.