Paul K. Jo
Georgia Institute of Technology
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Publication
Featured researches published by Paul K. Jo.
IEEE Transactions on Components, Packaging and Manufacturing Technology | 2016
Muneeb Zia; Taiyun Chi; Jong Seok Park; Amy Su; Joe L. Gonzalez; Paul K. Jo; Mark P. Styczynski; Hua Wang; Muhannad S. Bakir
This paper presents a 3-D integrated disposable “electronic microplate” (e-microplate) platform that allows the reuse of CMOS biosensor, thereby significantly reducing cost and increasing throughput compared to nondisposable biosensing systems. The e-microplate utilizes mechanically flexible interconnects and through-silicon-vias to electrically connect the cells cultured on the top (sensing electrode side) of the e-microplate to the electrodes on the CMOS biosensor while maintaining a physical separation between the aforementioned substrate tiers. Electrical measurements performed show that the incorporation of the e-microplate does not degrade the sensing amplifiers gain, 3-dB bandwidth, or the input referred noise; this ensures a high signal-to-noise ratio allowing accurate sensing of weak signals from living cells under test. Cell growth experiments performed show adhesion and growth of mouse embryonic stem cells on the surface of the sensing electrodes of the e-microplate. Impedance mapping for Dulbeccos phosphate buffered saline solution performed with the e-microplate, for two different e-microplate assemblies, confirms the functional accuracy of the assembled systems.
topical meeting on silicon monolithic integrated circuits in rf systems | 2017
Hanju Oh; Xuchen Zhang; Paul K. Jo; Gary S. May; Muhannad S. Bakir
In this paper, two integration technologies are discussed for heterogeneously integrated microsystems. First, this paper presents low-loss TSVs using an air-isolation technique for silicon interposers. The proposed air-isolated TSVs exhibit approximately 35% and 37% reduction in insertion loss and capacitance, respectively, at 20 GHz. Moreover, this paper presents a TSV-less integration technology using bridge chips and Compressible MicroInterconnects (CMIs). Compared to other packaging and assembly options, the investigated TSV-less approach provides monolithic-like electrical performance by significantly reducing chip-to-chip interconnect length and loss, increasing interconnect density, and providing the ability to seamlessly integrate chips of diverse functionalities.
electronic components and technology conference | 2017
Paul K. Jo; Muneeb Zia; Joe L. Gonzalez; Muhannad S. Bakir
In this paper, dense, highly elastic compressible microinterconnects (CMIs) are presented as an enabling technology for next generation sockets, probe cards and heterogeneous integrated systems. Free-standing CMIs with 75 µm height are fabricated using a thick sacrificial photoresist layer with an upward curved sidewall profile. The CMIs show a 45 µm vertical elastic range of motion. The fabricated CMIs have an in-line pitch of 150 µm, mechanical compliance of 9.2 mm/N, and vertical elastic motion of up to 5,000 indentation cycles. The smallest in-line pitch of CMIs demonstrated is 40 µm. The average post-assembly resistance of the CMIs, including the contact resistance, was measured to be 176.3 mΩ.
IEEE Electron Device Letters | 2017
Xuchen Zhang; Paul K. Jo; Muneeb Zia; Gary S. May; Muhannad S. Bakir
electronic components and technology conference | 2018
Paul K. Jo; Obaidul Hossen; Xuchen Zhang; Yang Zhang; Muhannad S. Bakir
IEEE\/ASME Journal of Microelectromechanical Systems | 2018
Joe L. Gonzalez; Paul K. Jo; Reza Abbaspour; Muhannad S. Bakir
IEEE Transactions on Electron Devices | 2018
Paul K. Jo; Xuchen Zhang; Joe L. Gonzalez; Gary S. May; Muhannad S. Bakir
IEEE Electron Device Letters | 2018
Joe L. Gonzalez; Paul K. Jo; Reza Abbaspour; Muhannad S. Bakir
IEEE Transactions on Components, Packaging and Manufacturing Technology | 2017
Paul K. Jo; Muneeb Zia; Joe L. Gonzalez; Hanju Oh; Muhannad S. Bakir
Archive | 2016
Paul K. Jo; Muneeb Zia; Joe L. Gonzalez; Chaoqi Zhang; Muhannid S Bakir