Paul Wettin

Complex network inspired fault-tolerant NoC architectures with wireless links

The Network-on-Chip (NoC) paradigm has emerged as a scalable interconnection infrastructure for modern multi-core chips. However, with growing levels of integration, the traditional NoCs suffer from high latency and energy dissipation in on-chip data transfer due to conventional metal/dielectric based interconnects. Three-dimensional integration, on-chip photonic, RF and wireless links have been proposed as radical low-power and low-latency alternatives to the conventional planar wire-based designs. Wireless NoCs with Carbon Nanotube (CNT) antennas are shown to outperform traditional wire based NoCs by several orders of magnitude in power dissipation and latency. However such transformative technologies will be prone to high levels of faults and failures due to various issues related to manufacturing and integration. On the other hand, several naturally occurring complex networks such as colonies of microbes and the internet are known to be inherently fault-tolerant against high rates of failures and harsh environments. This paper proposes to adopt such complex network based architectures to minimize the effect of wireless link failures on the performance of the NoC. Through cycle accurate simulations it is shown that the wireless NoC architectures inspired by natural complex networks perform better than their conventional wired counterparts even in the presence of a high degree of faults.

Design Space Exploration for Wireless NoCs Incorporating Irregular Network Routing

The millimeter-wave small-world wireless network-on-chip (mSWNoC) is an enabling interconnect architecture to design high-performance and low-power multicore chips. As the mSWNoC has an overall irregular topology, it is essential to design and optimize suitable deadlock-free routing mechanisms for it. In this paper, we quantify the latency, energy dissipation, and thermal profiles of mSWNoC architectures by incorporating irregular network routing strategies. We demonstrate that the latency, energy dissipation, and thermal profile are affected by the adopted routing methodologies. The overall system performance and thermal profile are governed by the traffic-dependent optimization of the routing methods. Our aim is to establish the energy-thermal-performance trade-offs for the mSWNoC depending on the exact routing strategy and the characteristics of the benchmarks considered.

Architecture and Design of Multichannel Millimeter-Wave Wireless NoC

The network-on-chip (NoC) is an enabling methodology to integrate many embedded cores on a single die. The existing method of implementing a NoC with planar metal interconnects is deficient due to high latency and significant power consumption arising out of multi-hop links used in data exchanges. To address these problems, this paper introduces design methodology for a wireless NoC with multiple nonoverlapping channels. The authors present both the physical layer design and the overall interconnection architecture.

Energy-efficient multicore chip design through cross-layer approach

Traditional multi-core designs, based on the Network-on-Chip (NoC) paradigm, suffer from high latency and power dissipation as the system size scales up due to the inherent multi-hop nature of communication. Introducing long-range, low power, and high-bandwidth, single-hop links between far apart cores can significantly enhance the performance of NoC fabrics. In this paper, we propose design of a small-world network based NoC architecture with on-chip millimeter (mm)-wave wireless links. The millimeter wave small-world NoC (mSWNoC) is capable of improving the overall latency and energy dissipation characteristics compared to the conventional mesh-based counterpart. The mSWNoC helps in improving the energy dissipation, and hence the thermal profile, even further in presence of network-level dynamic voltage and frequency scaling (DVFS) without incurring any additional latency penalty.

Performance evaluation of wireless NoCs in presence of irregular network routing strategies

The millimeter (mm)-wave small-world wireless NoC (mSWNoC) is an enabling interconnect architecture to design high performance and low power multicore chips. As the mSWNoC has an overall irregular topology, it is extremely important to design suitable deadlock-free routing mechanisms for it. In this paper we quantify the latency, energy dissipation, and thermal profiles of mSWNoC architectures by incorporating irregular network routing strategies. We demonstrate that the latency, energy dissipation, and thermal profile are affected by the adopted routing methodologies. In presence of the benchmarks considered, the variation in latency and energy dissipation is small. However, the network hotspot temperature can vary considerably depending on the exact routing strategy and the characteristics of the benchmark.

Complex network-enabled robust wireless network-on-chip architectures

The Network-on-Chip (NoC) paradigm has emerged as a scalable interconnection infrastructure for modern multicore chips. However, with growing levels of integration, the traditional NoCs suffer from high latency and energy dissipation in on-chip data transfer due to conventional multihop metal/dielectric-based interconnects. Three-dimensional integration, on-chip photonics, RF, and wireless links have been proposed as radical low-power and low-latency alternatives to the conventional planar wire-based designs. Wireless NoCs with Carbon NanoTube (CNT) antennas are shown to outperform traditional wire-based NoCs significantly in achievable data rate and energy dissipation. However, such emerging and transformative technologies will be prone to high levels of failures due to various issues related to manufacturing challenges and integration. On the other hand, several naturally occurring complex networks such as colonies of microbes and the World Wide Web are known to be inherently robust against high rates of failures and harsh environments. This article advocates adoption of such complex network-based architectures to minimize the effect of wireless link failures on the performance of the NoC. Through cycle-accurate simulations it is shown that the wireless NoC architectures inspired by natural complex networks perform better than their conventional wired counterparts even in the presence of high degrees of link failures. We demonstrate the robustness of the proposed wireless NoC architecture by incorporating both uniform and application-specific traffic patterns.

Iterative detection and decoding for the four-rectangular-grain TDMR model

This paper considers detection and error control coding for the two-dimensional magnetic recording (TDMR) channel modeled by the two-dimensional (2D) four-rectangular-grain model proposed by Kavcic, Huang et. al. in 2010. This simple model captures the effects of different 2D grain sizes and shapes, as well as the TDMR grain overwrite effect: grains large enough to be written by successive bits retain the polarity of only the last bit written. We construct a row-by-row BCJR detection algorithm that considers outputs from two rows at a time over two adjacent columns, thereby enabling consideration of more grain and data states than previously proposed algorithms that scan only one row at a time. The proposed algorithm employs soft-decision feedback of grain states from previous rows to aid the estimation of current data bits and grain states. Simulation results using the same average coded bit density and serially concatenated convolutional code (SCCC) as a previous paper by Pan, Ryan, et. al. show gains in user bits/grain of up to 6.7% over the previous work when no iteration is performed between the TDMR BCJR and the SCCC, and gains of up to 13.4% when the detector and the decoder iteratively exchange soft information.

Energy-efficient VFI-partitioned multicore design using wireless NoC architectures

In recent years, multiple Voltage Frequency Island (VFI)-based designs have increasingly made their way into both commercial and research multicore platforms. On the other hand, the wireless Network-on-Chip (WiNoC) architecture has emerged as an energy-efficient and high bandwidth communication backbone for massively integrated multicore platforms. It becomes therefore possible to exploit the small-world effects induced by the wireless links of a WiNoC to achieve efficient inter-VFI data exchanges. In this work, we demonstrate that WiNoCs can provide better latency and energy profiles compared to traditional mesh-like architecture for VFI-partitioned multicore designs. The performance gains and energy efficiency are achieved due to the low-power wireless shortcuts in conjunction with the small-world architecture. Indeed, our experimental results show energy improvements as large as 40% for multithreaded application benchmarks.

Iterative Detection and Decoding for TDMR With 2-D Intersymbol Interference Using the Four-Rectangular-Grain Model

This paper considers detection and error control coding for the 2-D magnetic recording (TDMR) channel modeled with the 2-D four-rectangular-grain model (FRGM). This simple model captures the effects of different 2-D grain sizes and shapes, as well as the TDMR grain overwrite effect. We construct a row-by-row Bahl-Cocke-Jelinek-Raviv-based detector that processes two rows at a time. Simulation results using the same coded bit density and channel code as a previous paper on FRGM detection show gains in user bits per grain of up to 13.4% when the detector and the decoder iteratively exchange soft information, resulting in densities higher than 0.5 user bits per grain under all scenarios simulated. When the proposed detector/decoder operates on coded bits read from a random Voronoi grain model, the achieved density drops to 0.25 user bits per grain due to model mismatch between the detector and the data. Finally, this paper considers an iterative detection and decoding scheme combining TDMR detection, 2-D-intersymbol interference (ISI) detection, and soft-in/soft-out channel decoding in a structure with two iteration loops. Simulation results for the concatenated FRGM and

Performance Evaluation of Congestion-Aware Routing with DVFS on a Millimeter-Wave Small-World Wireless NoC

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