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Publication
Featured researches published by Peter Ramm.
FRONTIERS OF CHARACTERIZATION AND METROLOGY FOR NANOELECTRONICS: 2011 | 2011
Laurens Kwakman; German Franz; Maaike M. Visser Taklo; Armin Klumpp; Peter Ramm
Today 3D integration based on TSVs is a well accepted approach to further improve Integrated Circuits in terms of miniaturization, performance, power consumption and heterogeneous integration. However, 3D integration comes with the introduction of many new processes and materials that may affect behavior and reliability of the overall system. Therefore, there is a strong demand for physical characterization and failure analysis and more explicitly, also for tools and techniques that allow for easy chip access and navigation to the site of interest and that can provide physical information at the nanometer scale within a large field of view.In the framework of the European project JEMSIP‐3D, a novel plasma‐FIB platform has been developed and evaluated by the project partners. This new platform has been characterized in terms of mill rates, resolution and ion assisted CVD kinetics and effective methods have been developed to suppress the curtaining that may appear on X‐sections due to variations in materia...
Japanese Journal of Applied Physics | 1996
Dieter Bollmann; Christof Landesberger; Peter Ramm; Karl Haberger
In solid state technology, two silicon wafers can be combined by wafer bonding. Small particles between the two surfaces may cause voids. For quality control, the voids can be detected by transmission of infrared light, provided by a Nd:YAG laser at a wavelength of 1.064 µm, where silicon is transparent. The defects are made visible via a CCD-camera on the monitor of a computer and appear as interference rings. This paper describes a method to enhance the visibility of the defect relative to other superimposed patterns e.g. from metallization. The voids are deformed elastically by applicating an external air pressure inside an inspection chamber. Insufficient bonded wafers, caused by particles as small as 1/2 µm, can be detected by routine in order to enhance the yield.
216th ECS Meeting | 2010
Nicolas Lietaer; Maaike M. Visser Taklo; Kari Schjo̸lberg-Henriksen; Peter Ramm
3D integration and wafer level packaging (WLP) with throughsilicon vias offer benefits like reduced footprint and improved performance. CMOS imaging sensors is one of the first successful introductions of a product with TSVs on the market, and 3D integrated memory stacks are expected to follow soon. Also sensor and actuator systems based on microand nano-electromechanical systems (MEMS/NEMS) will greatly benefit from WLP and 3D integration of the transducers and their readout and controller ICs. Ultimately, heterogeneous integration of different device technologies will allow the fabrication of MEMS/IC and NEMS/IC products with new and improved functionalities. For this to become a reality, cost-effective and reliable 3D integration technologies need to be developed. This paper gives an overview and reports on the current status of 3D interconnect technologies that will enable 3D integration for advanced MEMS/NEMS applications.
Additional Conferences (Device Packaging, HiTEC, HiTEN, & CICMT) | 2015
Peter Ramm; Armin Klumpp; Alan Mathewson; Kafil M. Razeeb; Reinhard Pufall
The European 3D heterogeneous integration platform has been established by the consortium of the Integrated Project e-BRAINS [1], where technologies of the following relevant main categories of 3D ...
Archive | 2000
Peter Ramm; Armin Klumpp
Integration Issues of Miniaturized Systems - MOMS, MOEMS, ICS and Electronic Components (SSI), 2008 2nd European Conference & Exhibition on | 2008
Robert Wieland; Karlheinz Bock; Erwin Hacker; Christof Landesberger; Peter Ramm
Archive | 1998
Karl Haberger; Peter Ramm
Archive | 2000
Peter Ramm; Armin Klumpp
Archive | 1998
Karl Haberger; Peter Ramm
Handbook of Wafer Bonding | 2012
Armin Klumpp; Peter Ramm