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Pradeep Thiagarajan

IBM

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Featured researches published by Pradeep Thiagarajan.

symposium on cloud computing | 2005

A Low Jitter Programmable Frequency Synthesizer for 4.25Gbps Serial Link Applications

Ram Kelkar; Dave Flye; Anjali R. Malladi; Joseph Natonio; Chri Scoville; Ken Short; Pradeep Thiagarajan

This paper describes a wide-range programmable frequency synthesizer building block for 4.25Gbps serial link applications. A unique feature of the design is the use of variable gain charge pumps to adjust loop gain as well as damping in order to minimize output jitter. The synthesizer architecture includes pre and post dividers to maximize programmability. A novel implementation of the high speed divide circuit is also described

Archive | 2009

Environmental and computing cost reduction with improved reliability in workload assignment to distributed computing nodes

Igor Arsovski; Anthony R. Bonaccio; Hayden C. Cranford; Alfred Degbotse; Joseph A. Iadanza; Todd E. Leonard; Pradeep Thiagarajan; Sebastian T. Ventrone

Archive | 2006

Programmable low-power high-frequency divider

John S. Austin; Ram Kelkar; Pradeep Thiagarajan

Archive | 2008

Design Structure for a Clock Distribution Network, Structure, and Method for Providing Balanced Loading in Integrated Circuit Clock Trees

Serafino Bueti; Hayden C. Cranford; Joseph A. Iadanza; Pradeep Thiagarajan; Sebastian T. Ventrone

Archive | 2007

DESIGN STRUCTURES, METHOD AND SYSTEMS OF POWERING ON INTEGRATED CIRCUIT

Igor Arsovski; Anthony R. Bonaccio; Serafino Bueti; Hayden C. Cranford; Joseph A. Iadanza; Todd E. Leonard; Hemen R. Shah; Pradeep Thiagarajan; Sebastian T. Ventrone

Archive | 2004

APPARATUS AND METHOD FOR HIGH FREQUENCY STATE MACHINE DIVIDER WITH LOW POWER CONSUMPTION

Ram Kelkar; Pradeep Thiagarajan

Archive | 2007

DESIGN STRUCTURE FOR A FLEXIBLE MULTIMODE LOGIC ELEMENT FOR USE IN A CONFIGURABLE MIXED-LOGIC SIGNAL DISTRIBUTION PATH

Igor Arsovski; Anthony R. Bonaccio; Hayden C. Cranford; Joseph A. Iadanza; Pradeep Thiagarajan; Sebastian T. Ventrone

Archive | 2006

Clock Distribution Network, Structure, And Method For Providing Balanced Loading In Integrated Circuit Clock Trees

Serafino Bueti; Hayden C. Cranford; Joseph A. Iadanza; Pradeep Thiagarajan; Sebastian T. Ventrone

Archive | 2011

PROGRAMMABLE DUTY CYCLE SELECTION USING INCREMENTAL PULSE WIDTHS

Grant P. Kesselring; Pradeep Thiagarajan

Archive | 2008

METHOD FOR DIVIDING A HIGH-FREQUENCY SIGNAL

John S. Austin; Ram Kelkar; Pradeep Thiagarajan

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Hayden C. Cranford

IBM

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Marcel Kossel

IBM

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Sebastian T. Ventrone

IBM

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Daihyun Lim

IBM

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Joseph A. Iadanza

IBM

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Anthony R. Bonaccio

IBM

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Igor Arsovski

IBM

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Serafino Bueti

IBM

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Anjali R. Malladi

IBM

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Todd E. Leonard

IBM

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