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Dive into the research topics where Praful Jain is active.

Publication


Featured researches published by Praful Jain.


radiation effects data workshop | 2015

Neutron, 64 MeV Proton, Thermal Neutron and Alpha Single-Event Upset Characterization of Xilinx 20nm UltraScale Kintex FPGA

Pierre Maillard; Michael J. Hart; Jeff Barton; Praful Jain; James Karp

The single-event response of Xilinx 20nm UltraScale Kintex FPGA is characterized using neutron, 64 MeV proton, thermal neutron and alpha foil irradiation sources. Single-event upset and multi-bits upset results are presented.


radiation effects data workshop | 2015

Impact of Temperature and Vcc Variation on 20nm Kintex UltraScale FPGAs Neutron Soft Error Rate

Pierre Maillard; Michael J. Hart; Jeff Barton; Praful Jain; James Karp

The single-event response vs. temperature and Vcc supply voltage of the 20nm Kintex UltraScale FPGA is characterized using a 64 MeV proton beam as proxy for atmospheric neutron. Single-event upset and multi-bit upset results are presented.


Archive | 2015

Reduction of single event upsets within a semiconductor integrated circuit

Praful Jain; James Karp; Michael J. Hart; Ramakrishna K. Tanikella


Archive | 2015

Single-event upset mitigation in circuit design for programmable integrated circuits

Praful Jain; Pierre Maillard


Archive | 2015

Single event upset enhanced architecture

Santosh Kumar Sood; Praful Jain; Ramakrishna K. Tanikella


Archive | 2014

Master-slave flip-flops and methods of implementing master-slave flip-flops in an integrated circuit

Pierre Maillard; Praful Jain; Michael J. Hart; Sundeep Ram Gopal Agarwal; Austin H. Lesea; Jun Liu


Archive | 2017

Circuit for and method of preventing multi-bit upsets induced by single event transients

Pierre Maillard; Michael J. Hart; Praful Jain; Robert I. Fu


Archive | 2014

Selection of logic paths for redundancy

Praful Jain; Pierre Maillard; James Karp; Michael J. Hart


Archive | 2014

Circuit design-specific failure in time rate for single event upsets

Praful Jain; James Karp


Archive | 2014

INTERCONNECT CIRCUITS HAVING LOW THRESHOLD VOLTAGE P-CHANNEL TRANSISTORS FOR A PROGRAMMABLE INTEGRATED CIRCUIT

Praful Jain; Michael J. Hart

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