Puneet Srivastava

AlGaN/GaN/AlGaN Double Heterostructures Grown on 200 mm Silicon (111) Substrates with High Electron Mobility

In this work, we demonstrate, for the first time, Al0.35GaN/GaN/Al0.25GaN double heterostructure field effect transistors on 200 mm Si(111) substrates. Thick crack-free Al0.25GaN buffer layers are achieved by optimizing Al0.75GaN/Al0.5GaN intermediate layers and AlN nucleation layers. The highest buffer breakdown voltage reaches 1380 V on a sample with a total buffer thickness of 4.6 µm. According to Van der Pauw Hall measurements, the electron mobility is 1766 cm2 V-1 s-1 and the electron density is 1.16×1013 cm-2, which results in a very low sheet resistance of 306±8 Ω/square.

Record Breakdown Voltage (2200 V) of GaN DHFETs on Si With 2-

In this letter, we present a local substrate removal technology (under the source-to-drain region), reminiscent of through-silicon vias and report on the highest ever achieved breakdown voltage (V_BD) of AlGaN/GaN/AlGaN double heterostructure FETs on a Si (111) substrate with only 2-μm-thick AlGaN buffer. Before local Si removal, V_BD saturates at ~700 V at a gate-drain distance (L_GD) ≥ 8 μm. However, after etching away the substrate locally, we measure a record V_BD of 2200 V for the devices with L_GD = 20 μm. Moreover, from Hall measurements, we conclude that the local substrate removal integration approach has no impact on the 2-D electron gas channel properties.

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In this letter, we present a novel approach to enhance the breakdown voltage (<i>V</i>_BD) for AlGaN/GaN/AlGaN double-heterostructure FETs (DHFETs), grown by metal-organic chemical vapor deposition on Si (111) substrates through a silicon-substrate-removal and a layer-transfer process. Before removing the Si substrate, both buffer isolation test structures and DHFET devices showed a saturation of <i>V</i>_BD due to the electrical breakdown through the Si substrate. We observed a <i>V</i>_BD saturation of 500 V for isolation gaps larger than 6 μm . After Si removal, we measured a <i>V</i>_BD enhancement of the AlGaN buffer to 1100 V for buffer isolation structures with an isolation gap of 12 μm. The DHFET devices with a gate-drain (<i>L</i>_GD) distance of 15 μm have a V_BD > 1100 V compared with ~300 V for devices with Si substrate. Moreover, from Hall measurements, we conclude that the substrate-removal and layer-transfer processes have no impact on the 2-D electron gas channel properties.

Buffer Thickness by Local Substrate Removal

In this work, the gate degradation of GaN-based HEMTs is analyzed. We find that the gate degradation does not occur only beyond a critical voltage, but it has a strong voltage accelerated kinetics and a weak temperature dependence. By means of a statistical study we show that the time-to-failure can be fitted best with a Weibull distribution. By using the distribution parameters and a power law model it is possible to perform lifetime extrapolation based on the gate degradation at a defined failure level and temperature for the first time. From this elaboration, the lifetime of a given device geometry can also be extracted. Eventually, the strong bias dependence of the gate degradation reported here implies that this phenomenon should be assessed by means of a voltage-based accelerated investigation as described in this work.

Silicon Substrate Removal of GaN DHFETs for Enhanced (<1100 V) Breakdown Voltage

The breakdown mechanism in GaN-based heterostructures (HFETs) grown on silicon substrate is investigated in detail by TCAD simulations and silicon substrate removal technique. High-voltage electrical measurements show that the breakdown voltage saturates for larger gate-drain distances. This failure mechanism is dominated by the avalanche breakdown in the Si substrate. High-voltage TCAD simulations of AlGaN/GaN/Si substrate structures show higher impact ionization factor and electron density at the Si interface indicating a leakage current path where avalanche breakdown occurs. Experimentally, by etching off the Si substrate the breakdown voltage no longer saturates and linearly increases for all gate-drain gaps. We propose the silicon removal technique as a viable way to enhance the breakdown voltage of AlGaN/GaN devices grown on Si substrate.

A comprehensive reliability investigation of the voltage-, temperature- and device geometry-dependence of the gate degradation on state-of-the-art GaN-on-Si HEMTs

Conventional GaN vertical devices, though promising for high-power applications, need expensive GaN substrates. Recently, low-cost GaN-on-Si vertical diodes have been demonstrated for the first time. This paper presents a systematic study to understand and control the OFF-state leakage current in the GaN-on-Si vertical diodes. Various leakage sources were investigated and separated, including leakage through the bulk drift region, passivation layer, etch sidewall, and transition layers. To suppress the leakage along the etch sidewall, an advanced edge termination technology has been developed by combining plasma treatment, tetramethylammonium hydroxide wet etching, and ion implantation. With this advanced edge termination technology, an OFF-state leakage current similar to Si, SiC, and GaN lateral devices has been achieved in the GaN-on-Si vertical diodes with over 300 V breakdown voltage and 2.9-MV/cm peak electric field. The origin of the remaining OFF-state leakage current can be explained by a combination of electron tunneling at the p-GaN/drift-layer interface and carrier hopping between dislocation traps. The low leakage current achieved in these devices demonstrates the great potential of the GaN-on-Si vertical device as a new low-cost candidate for high-performance power electronics.

Experimental and simulation study of breakdown voltage enhancement of AlGaN/GaN heterostructures by Si substrate removal

III-Nitride materials are very promising to be used in next-generation high-frequency power switching applications. In this letter, we demonstrate the performance of normally off AlGaN/GaN/AlGaN double-heterostructure FETs (DHFETs) using a boost-converter circuit. The figures of merit of our large (57.6-mm gate width) GaN transistor are presented: RON * QG of 2.5 Ω·nC is obtained at VDS = 140 V. The switching performance of the GaN DHFET is studied in a dedicated high-frequency boost converter: both the switching times and power losses are characterized. We show converter efficiency values up to 96.1% at 500 kHz and 93.9% at 850 kHz at output power of 100 W.

Origin and Control of OFF-State Leakage Current in GaN-on-Si Vertical Diodes

We describe the fabrication and characteristics of high voltage enhancement mode SiN/AlGaN/GaN/AlGaN double heterostructure FET devices. The Si3N4 not only acts as a passivation layer but is crucial in the device concept as it acts as an electron donating layer (1). By selective removal under the gate of the in-situ SiN, we realize e-mode operation with a very narrow threshold voltage distribution with an average value of +475 mV and a standard deviation of only 15 mV. Compared to the reference depletion mode devices, we see no impact of the e-mode architecture on the breakdown behaviour. The devices maintain very low leakage currents even at drain biases up to 80% of the breakdown voltage.

A 96% Efficient High-Frequency DC–DC Converter Using E-Mode GaN DHFETs on Si

We report on the first measurement results to obtain over 2 kV breakdown voltage (VBD) of GaN-DHFETs on Si substrates by etching a Si Trench Around Drain contacts (STAD). Similar devices without trenches show VBD of only 650 V. DHFETs fabricated with STAD technology show excellent thermal performance confirmed by electrical measurements and finite element thermal simulations. We observe lower buffer leakage at high temperature (100°C) after STAD compared to devices with Si substrate, enabling high temperature device operation.

Low leakage high breakdown e-mode GaN DHFET on Si by selective removal of in-situ grown Si 3 N 4

We present the first measurement results from hybrid AlGaN-on-Si-based Extreme Ultraviolet (EUV) imagers with 10 µm pixel-to-pixel pitch. The 256×256 backside illuminated Focal Plane Arrays (FPAs) were hybridized to dedicated Si-based CMOS Readouts (ROICs). The AlGaN active layer with 40% Al concentration provides an intrinsic rejection of wavelengths larger than 280 nm (solar blindness), together with enhanced radiation hardness (1). Sensitivity in Deep UV (DUV), Far UV (FUV) and Extreme UV (EUV) was verified using synchrotron radiation down to a wavelength of 1 nm.