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Featured researches published by R.M.D.A. Velghe.


european solid-state device research conference | 2002

The RF Potential of High-performance 100nm CMOS Technology

V.C. Venezia; A.J. Scholten; C. Detcheverry; H. Boots; W. Jeamsaksin; L. Grau; D.B.M. Klaassen; R.M.D.A. Velghe; R.J. Havens; L.F. Tiemeijer

We have investigated the RF potential of 100nm CMOS technology. A high cut-off frequency of 140 GHz for 80nm (actual gate length) NMOS devices was achieved. Combining on wafer measurements with the compact model MOS model 11, we demonstrate that an fmax of 320GHz is achievable on scaled NMOS devices.


european solid state device research conference | 1991

Physics-Based Circuit-Level Model for Sub-Micron MOSFETs

R.M.D.A. Velghe; F.M. Klaassen

A good circuit-level model for well-scaled submicron MOSFETs is needed in circuit simulators to design integrated circuits with these transistors in an accurate way. Due to the scaling, thinner gate insulators are required and give rise to an increase of the normal electric field in the oxide region. So the effect of surface roughness on the drain current becomes manifest. In addition a further reduction of the current is caused by the increased effect of series resistance caused by the use of graded source/drain junctions. This paper presents a physics-based circuit-level model where these effects are quantitatively taken into account.


european solid state device research conference | 1989

Compact Modelling of the MOSFET Drain Conductance

F.M. Klaassen; R.M.D.A. Velghe

A new compact MOSFET model for analog design applications is presented. In particular results for the drain conductance are discussed in detail. A comparison between measured and modelled data for a wide variety of CMOS devices shows an excellent agreement.


european solid state device research conference | 1988

The Series Resistance of Submicron MOSFETs and its Effect on their Characteristics

F.M. Klaassen; P.T.J. Biermans; R.M.D.A. Velghe


european solid state device research conference | 1994

Compact MOS modelling for analog circuit simulation

R.M.D.A. Velghe; D.B.M. Klaassen; F.M. Klaassen


european solid state device research conference | 1994

Compact MOS Modelling for Analogue Circuit Simulation

R.M.D.A. Velghe; D.B.M. Klaassen; F.M. Klaassen


european solid state device research conference | 1995

Prediction of compact MOS model parameters for low-power application

R.M.D.A. Velghe; D.B.M. Klaassen


device research conference | 2010

Optimized Scaled LOCOS Isolation Scheme for 0.25 μm CMOS

V.M.H. Meyssen; R.M.D.A. Velghe; A.H. Montree


Membrane Technology | 1993

Physical Modelling and Simulation of Advanced Si-devices - An Industrial Approach

Jan W. Slotboom; M.J. van Dort; G.A.M. Hurkx; D.B.M. Klaassen; W.J. Kloosterman; F. van Rijs; G. Streutker; R.M.D.A. Velghe

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