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Dive into the research topics where Ramya Viswanathan is active.

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Featured researches published by Ramya Viswanathan.


Proceedings of SPIE | 2012

Process optimization through model based SRAF printing prediction

Ramya Viswanathan; Jaione Tirapu Azpiroz; Punitha Selvam

Sub-Resolution Assist Features (SRAFs) are used in optical lithography to improve the manufacturing process window (PW). They are added to the mask shapes to create a denser environment that improves the printability of the target design shapes on wafer. As the critical dimensions (CDs) that need to be patterned shrink with every technology generation, SRAFs have become a critical and key component in enabling processes with manufacturable process windows. The size and placement of the SRAFs must be carefully optimized to provide the maximum benefit to the main feature while avoiding any printing on resist that could affect subsequent etching processes. The un-intended printing of assist features on wafer is a critical yield detractor and is especially pervasive in newer technology nodes, where more aggressive and more complex SRAF patterns and placement are becoming commonplace. The need for the accurate prediction of SRAF printing is therefore very important to achieve the maximum main feature process window benefit without any assist feature printing. Traditionally, the optimization of SRAF sizing and placement consisted of a set of rules obtained through the extensive analysis of wafer printability on a variety of assisted mask patterns while using Scanning Electron Microscope images of the resist surface to monitor unwanted SRAF printing. Recent advances in model-based assist feature optimization methods allow for the automated adjustment of both main feature and assist feature size and placement through simulation of the aerial image, but critically rely on the accuracy of the lithography process model to ensure non-printing of the SRAF. Lithography or Optical Proximity Correction (OPC) models usually comprising an optical and a resist model are calibrated to measurements of the resist bottom CD. These models are naturally better at predicting the printing of SRAFS that are lines in resist. When the SRAFs are holes in resist, for eg. assist features supporting main features on a dark field mask, or SRAFs supporting inverse tone features on a bright field mask, these models do not have the required accuracy in predicting SRAF printing. SRAF printability prediction has thus far been tackled by large dose adjustments to the OPC model, to match simulation to wafer results. The drawbacks of this method have been two-fold - simple dose adjustments do not accurately predict printing across various SRAF configurations and the main feature printability is compromised We present in this paper a method to calibrate and predict printing of assist features that appear as a dimpling in the resist surface, by carefully selecting the calibration data and separately tuning the model parameters for the main feature and of the SRAF printing models. With this method, we obtain a model that accurately predicts the printing of various configurations of SRAFs on wafer while still maintaining the accuracy on the main features. An analysis of the implementation of such a model in the OPC flow and the corresponding supporting results will be presented.


Proceedings of SPIE | 2010

The feasibility of using image parameters for test pattern selection during OPC model calibration

Amr Abdo; Ramya Viswanathan

Model based optical proximity correction (MB-OPC) is essential for the production of advanced integrated circuits (ICs). Calibration of these OPC resist models uses empirical fitting of measured test pattern data. It seems logical that to produce OPC models, acquiring more data will always improve the OPC model accuracy; on the other hand, reducing metrology and model build time is also a critical and continually escalating requirement with the constant increase in the complexity of the IC development process. A trade off must therefore be made to obtain adequate number of data points that produce accurate OPC models without overloading the metrology tools and resources. In this paper, we are examining the feasibility of using the image parameters (IPs) to select the test patterns. The approach is to base our test pattern selection only on the IPs and verify that the resulting OPC model is accurate. Another approach is to reduce the data gradually in different steps using IP considerations and see how the OPC model performance changes. A third, compromise approach is to specify a test pattern set based on IPs and add to that set few patterns based on different considerations. The three approaches and their results are presented in details in this paper.


Proceedings of SPIE | 2010

Automation of Sample Plan Creation for Process Model Calibration

James M. Oberschmidt; Amr Abdo; Tamer Desouky; Mohamed Al-Imam; Azalia A. Krasnoperova; Ramya Viswanathan

The process of preparing a sample plan for optical and resist model calibration has always been tedious. Not only because it is required to accurately represent full chip designs with countless combinations of widths, spaces and environments, but also because of the constraints imposed by metrology which may result in limiting the number of structures to be measured. Also, there are other limits on the types of these structures, and this is mainly due to the accuracy variation across different types of geometries. For instance, pitch measurements are normally more accurate than corner rounding. Thus, only certain geometrical shapes are mostly considered to create a sample plan. In addition, the time factor is becoming very crucial as we migrate from a technology node to another due to the increase in the number of development and production nodes, and the process is getting more complicated if process window aware models are to be developed in a reasonable time frame, thus there is a need for reliable methods to choose sample plans which also help reduce cycle time. In this context, an automated flow is proposed for sample plan creation. Once the illumination and film stack are defined, all the errors in the input data are fixed and sites are centered. Then, bad sites are excluded. Afterwards, the clean data are reduced based on geometrical resemblance. Also, an editable database of measurement-reliable and critical structures are provided, and their percentage in the final sample plan as well as the total number of 1D/2D samples can be predefined. It has the advantage of eliminating manual selection or filtering techniques, and it provides powerful tools for customizing the final plan, and the time needed to generate these plans is greatly reduced.


Metrology, inspection, and process control for microlithography. Conference | 2006

Model-based calculation of weighting in OPC model calibration

Mohamed Talbi; Amr Abdo; Daniel Fischer; Geng Han; Scott M. Mansfield; James M. Oberschmidt; Ramya Viswanathan

Optimal Proximity Correction (OPC) models are calibrated with Scanning Electron Microscope (SEM) data where the measurement uncertainty vary among pattern types (i.e., line versus space, 1D versus 2D and small versus large). The quality of the SEM measurement uncertaintys impact on OPC model integrity is mitigated through a weighting scheme. Statistical methods such as relating the weight to the SEM measurements standard deviation require more measurements per calibration structure than economically feasible. Similarly, the use of experience and engineering judgment requires many iterations before some reasonable weighting scale is determined. In this paper we present the results of OPC model fitness statistics associated with metrology based weights (MtBW) versus model based weights (MBW). The motivation for the latter approach is the promise for an unbiased, consistent, and efficient estimate of the model parameters.


Proceedings of SPIE | 2010

Three-dimensional physical photoresist model calibration and profile-based pattern verification

Mohamed Talbi; Amr Abdo; Todd C. Bailey; Will Conley; Derren Dunn; Masashi Fujimoto; John Nickel; No Young Chung; Sajan Marokkey; Si Hyeung Lee; Chandrasekhar Sarma; Dongbing Shao; Ramya Viswanathan

In this paper, we report large scale three-dimensional photoresist model calibration and validation results for critical layer models that span 32 nm, 28 nm and 22 nm technology nodes. Although methods for calibrating physical photoresist models have been reported previously, we are unaware of any that leverage data sets typically used for building empirical mask shape correction models. . A method to calibrate and verify physical resist models that uses contour model calibration data sets in conjuction with scanning electron microscope profiles and atomic force microscope profiles is discussed. In addition, we explore ways in which three-dimensional physical resist models can be used to complement and extend pattern hot-spot detection in a mask shape validation flow.


international conference on simulation of semiconductor processes and devices | 2015

Lithography process model building using locally linear embedding

Pardeep Kumar; Alan E. Rosenbluth; Babji Srinivasan; Ramya Viswanathan; Nihar R. Mohapatra

Practical models of lithographic processes are usually empirically calibrated, making their accuracy dependent on the total number of samples used to build the models, and more specifically on the selection of a representative set of samples for calibration. An inadequate number of samples can adversely impact model accuracy, but a broadly comprehensive set will excessively increase measurement cost. Lithography process models based on samples which are picked uniformly from populated regions of the original pattern space and are truly a representative set will improve model prediction accuracy, as is highly desirable for model based optical proximity correction (OPC) simulations. We propose a robust approach for sample plan selection for lithography process model building using locally linear embedding (LLE). The effectiveness of the proposed method is verified by simulating some critical layers in 14-nm and 22-nm complementary metal oxide semiconductor (CMOS) technology nodes. Experimental results show that without compromising model accuracy, LLE can provide a competitive representative sample plan selection in a single shot, in comparison with hundreds of random cross-validation experiments as an alternative.


Proceedings of SPIE | 2015

Experiments using automated sample plan selection for OPC modeling

Ramya Viswanathan; Om Jaiswal; Nathalie Casati; Amr Abdo; James M. Oberschmidt; Josef S. Watts; Maria Gabrani

OPC models have become critical in the manufacturing of integrated circuits (ICs) by allowing correction of complex designs, as we approach the physical limits of scaling in IC chip design. The accuracy of these models depends upon the ability of the calibration set to sufficiently cover the design space, and be manageable enough to address metrology constraints. We show that the proposed method provides results of at least similar quality, in some cases superior quality compared to both the traditional method and sample plan sets of higher size. The main advantage of our method over the existing ones is that it generates a calibration set much faster, considering a large initial set and even more importantly, by automatically selecting its minimum optimal size.


Proceedings of SPIE | 2014

Automated sample plan selection for OPC modeling

Nathalie Casati; Maria Gabrani; Ramya Viswanathan; Zikri Bayraktar; Om Jaiswal; David L. DeMaris; Amr Abdo; James M. Oberschmidt; Andreas Krause

It is desired to reduce the time required to produce metrology data for calibration of Optical Proximity Correction (OPC) models and also maintain or improve the quality of the data collected with regard to how well that data represents the types of patterns that occur in real circuit designs. Previous work based on clustering in geometry and/or image parameter space has shown some benefit over strictly manual or intuitive selection, but leads to arbitrary pattern exclusion or selection which may not be the best representation of the product. Forming the pattern selection as an optimization problem, which co-optimizes a number of objective functions reflecting modelers’ insight and expertise, has shown to produce models with equivalent quality to the traditional plan of record (POR) set but in a less time.


SPIE Photomask Technology | 2011

Using custom features to check OPC model performance

Amr Abdo; Ramya Viswanathan

Model Based Optical Proximity Correction (MB- OPC) is essential for the production of advanced Integrated Circuits (ICs). As the speed and functionality requirements of ICs production always require reducing the Critical Dimension (CD), the demand is continuously increasing for more accurate and representative OPC models. The current known best practice is to calibrate OPC models with measured test patterns. Test patterns are selected to represent the final designs to be printed in any specific technology that will use the OPC solution. The accuracy of the OPC models is critical to obtain the right product pattern dimension and consequently to the success of the IC production process. After building the OPC model, a model verification step is completed by the OPC modeling engineer to check the OPC model performance before using it in the IC production process. This model verification step is critical for selecting the best possible model that represents the lithography process. In this paper, we are proposing an additional technique for judging the accuracy and performance of the OPC model. The additional verification technique is to add on the test mask additional custom features specially designed in dimension and spacing in a way that they marginally print on the wafer. The accuracy of the OPC model is then tested by checking how the model predicts the printability of these additional structures.


Proceedings of SPIE | 2009

C-quad polarized illumination for back end thin wire: moving beyond annular illumination regime

Sohan Singh Mehta; Hyung-Rae Lee; Bassem Hamieh; Chidam Kallingal; Itty Matthew; Ramya Viswanathan; Derren Dunn

The objective of this work is to describe the advances in the use of C-Quad polarized illumination for densest pitches in back end of line thin wire in 32m technology and outlook for 28 nm technology with NA of 1.35 on a 193nm wavelength scanner. Through simulation and experiments, we found that moving from Annular to C-Quad illumination provides improvement in intensity and contrast. We studied the patterning performance of C-Quad illumination for 1D dense, semi dense, isolated features with and without polarization. Polarization shows great improvement in contrast and line edge roughness for dense pattern. Patterning performance of isolated and semi-isolated features was the same with and without polarization.

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