Ravi K. Mruthyunjaya

Effect of SiO 2 and SiO 2 /SiN x Passivation on the Stability of Amorphous Indium-Gallium Zinc-Oxide Thin-Film Transistors Under High Humidity

We studied the environmental stability of amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs) with single-layer (SiO2) and bilayer (SiO2/SiNx) passivation under high-humidity (80%) storage. During the 30 days of investigation, all single-layer passivated TFTs showed negative turn-ON voltage shifts (AVON), the size of which increased with storing time. The negative A VON is attributed to donor generation inside the active a-IGZO caused by the diffusion of ambient hydrogen/water molecules passing through the SiO2 passivation layer. The X-ray photoelectron spectroscopy depth profile for the SiO2 passivated structures confirms that the concentration of oxygen vacancies, which is initially larger at the a-IGZO/SiO2 interface, compared with the bulk a-IGZO, decreases after 30 days of storage under high humidity. This can be explained as the passivation of oxygen vacancies by diffused hydrogen. On the other hand, all bilayer passivated TFTs showed good air stability at room temperature and high humidity (80%).

Degradation Model of Self-Heating Effects in Silicon-on-Glass TFTs

This paper investigates the origin and reduction of self-heating effects in single-crystal silicon-on-glass (SiOG) thin-film transistors (TFTs). A hump forms in the transfer characteristics of p-channel SiOG TFTs when the temperature of the devices is increased either by direct heating or electrical biasing. The size of the hump proportionally scales with the channel width W, indicating that it is related to the bulk active-layer properties such as conduction through a backchannel. While the hump increases in the positive direction, the main transistor shifts in the negative direction with increasing self-heating stress time, supporting the exclusion of edge effects. The time dependence of the hump shift is well described by the stretched-exponential behavior, indicating that the backchannel is a result of electron trapping into the silica layer that is between the glass and silicon active layer. To mitigate this hump effect, we demonstrate in this paper that TFTs with an active layer divided into smaller parts along the W direction (in order to increase heat dissipation) show better stability to self-heating stress (i.e., no hump formation) than TFTs with full active layers. Split devices have more channel edges, compared with those with a full active layer, supporting the idea that the hump is indeed not due to edge effects.

Infinite Output Resistance of Corbino Thin-Film Transistors With an Amorphous-InGaZnO Active Layer for Large-Area AMOLED Displays

We report a low-voltage-driven amorphous indium-gallium-zinc oxide (a-IGZO) semiconductor-based Corbino (circular) thin-film transistor (TFT) with infinite output resistance beyond pinchoff. The Corbino TFT has inner and outer concentric ring electrodes, and when the latter is the drain, channel width (W) decreases with channel length (L), such that the W/L ratio is not changed after pinchoff. As demonstrated herein, this a-IGZO Corbino TFT is, therefore, a good candidate for uniform current drivers in applications, such as active-matrix organic light-emitting diode display pixels, where it would maintain the same drive (diode) currents, even with variations in supply voltage (VDD).

Analysis of Improved Performance Under Negative Bias Illumination Stress of Dual Gate Driving a-IGZO TFT by TCAD Simulation

We report the numerical simulation of the effect of a dual gate (DG) TFT structure operating under dual gate driving on improving negative bias illumination stress (NBIS) of amorphous indium gallium zinc oxide thin-film transistors (a-IGZO TFTs). With respect to the transfer characteristics of a-IGZO TFTs, we show a larger negative threshold voltage shift (ΔVTH) with increasing a-IGZO active layer thickness. This trend is confirmed by TCAD simulation, where the initial transfer curve is plotted under varying a-IGZO thickness keeping a constant density of states. Under varying a-IGZO thickness, TCAD simulation results confirm TFTs under DG driving shows significantly less ΔVTH shift under NBIS compared with that of single gate (SG) driving TFTs. Under 10 K seconds of NBIS, TCAD simulation results show the increase in donor-like states (NGD) by 5.25 × 1017 cm-3 eV-1 and acceptor-like states (NGA) by 7.5 × 1016 cm-3 eV-1.

Intrinsic Channel Mobility of Amorphous, In–Ga–Zn–O Thin-Film Transistors by a Gated Four-Probe Method

Intrinsic mobility and intrinsic channel resistance (R_CH) of amorphous, In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) with varying channel length (L) are investigated using a gated four-probe back-channel-etched TFT design. The intrinsic R_CH is found to decrease from ~500 to ~250 kΩ per unit area by increasing V_GS from 10 to 20 V. The intrinsic mobility is ~17 cm²/V·s, which is about 20% higher than that derived from the normal two-point probe measurements. Source and drain parasitic resistance (R_PAR) of the a-IGZO TFTs is found to be of the same order of magnitude as the R_CH-which is different from hydrogenated amorphous-silicon (a-Si:H) TFTs, where TFT operation is dominated by R_PAR.

Low Voltage Driven CMOS Circuits Based on Silicon on Glass

Low voltage driven inverter, ring oscillator and shift registor circuits using n- and p- channel TFTs based on Corning® Siliconon-Glass (SiOG) substrates are studied. The field effect mobility of n- and p-channel TFTs fabricated in SiOG are 226 and 165 cm 2 /V·s, respectively. The TFTs exhibited symmetric threshold voltages of ± 1.1 V and gate voltage swings of 0.21 ~ 0.23 V/dec. The total propagation delay time of the CMOS inverter was 2.54 ns at a supply voltage of 7 V. In addition, the rise and fall times of the shift register were found to be 0.5 µs and 0.7 µs at a VDD of 7 V, respectively. This work demonstrates the the ability to realize high performance integrated CMOS circuits on SiOG substrates.