Raymond J. E. Hueting

On the optimization of SiGe-base bipolar transistors

Extensive computer simulations of NPN SiGe-base bipolar transistors were performed to examine the effect of the Ge profile in the electrical characteristics. It is shown that extra charge storage in the emitter-base (E-B) junction, caused by the Ge profile, affects the device performance considerably. In addition, it is shown that an abrupt Ge profile in the middle of the base region is optimal for a given critical layer thickness of approximately 600A.

Gate-drain charge analysis for switching in power trench MOSFETs

For the switching performance of low-voltage (LV) power MOSFETs, the gate-drain charge density (Q/sub gd/) is an important parameter. The so-called figure-of-merit, which is defined as the product of the specific on-resistance (R/sub ds,on/) and Q/sub gd/ is commonly used for quantifying the switching performance for a specified off-state breakdown voltage (BV/sub ds/). In this paper, we analyzed the switching behavior in power trench MOSFETs by using experiments and simulations, focusing on the charge density Q/sub gd/. The results of this analysis can be used for further optimization of these devices. The results show that the Q/sub d/ can be split into three charge contributions: accumulation, depletion, and inversion charge. It is shown that the inversion charge is located mainly underneath the trench bottom. The accumulation and depletion charge contribute each about 45% in conventional LV trench MOSFETs and can be reduced by using a thick bottom oxide in a shallow trench gate just extending in the drift region. Further, we derived an analytical model for calculating the Q/sub gd/, that takes into account the geometry dependence.

Selective-epitaxial base technology with 14 ps ECL-gate delay, for low power wide-band communication systems

A silicon bipolar technology is presented that incorporates a selectively epitaxially grown base in a double-polysilicon transistor. Si-bases as well as Si-SiGe-multilayer bases are applied. Both result in excellent device performance, with cut-off and maximum oscillation frequencies up to 45 GHz, and ECL-gate delays down to 13.7 ps. DC-coupled broad-band amplifiers for 15 Gbit/s optical data links have been fabricated, providing record bandwidths of 13.2 GHz. As selective epitaxial growth is performed at 700/spl deg/C in a production epitaxial reactor, this technology can easily be combined with current semiconductor manufacturing technology.

Switching performance of low-voltage N-channel trench MOSFETs

Guidelines for optimising the switching behaviour of low-voltage (LV) n-channel trench MOSFETs are presented, with emphasis on the geometry and the doping profile. In our optimisation we focussed on three parameters: the specific on-resistance (R/sub ds,on/), the gate-drain charge density (Q/sub gd/) and the off-state breakdown voltage. We obtained by simulations for the 30 V control switch an R/sub ds,on/ of less than 10 m/spl Omega/.mm/sup 2/ and an R/sub ds,on//spl middot/Q/sub gd/ of less than 15 m/spl Omega/.nC (applied voltage V/sub dd/=12 V). The result is a stripe cell structure with a trench width of 0.15 /spl mu/m, a cell pitch of 1.0 /spl mu/m. For the 25 V synchronous rectifier we obtained in the same feature size figures-of-merit of 5 m/spl Omega/.mm/sup 2/ and 17 m/spl Omega/.nC.

A new trench bipolar transistor for RF applications

A new vertical trench SiGe heterojunction bipolar transistor (HBT) is proposed that improves the tradeoff between the cutoff frequency (f/sub T/) and the off-state collector-base breakdown voltage (BV/sub cbo/). Extensive device simulations show that a record f/sub T//spl middot/BV/sub cbo/ product of about 2375 GHz/spl middot/V can be obtained for an HBT having a trench field plate connected to the emitter and a linearly graded doping profile in the collector drift region, while about 700 GHz/spl middot/V can be obtained for a standard optimized HBT. This large improvement is explained mainly by the suppression of the base-widening effect.

Metal emitter SiGe:C HBTs

SiGe:C heterojunction bipolar transistors (HBTs) offer high cut-off frequencies, f/sub T/, but low open base breakdown voltages, BV/sub CEO/, due to the relatively high current gain, h/sub FE/. In this paper, we show that the integration of a metal emitter, made by complete silicidation of a mono-emitter, increases the base current, I/sub B/ without reducing the collector current, I/sub C/. Hence, the BV/sub CEO/ is increased without affecting the f/sub T/. Furthermore, this metal emitter reduces the emitter series resistance, R/sub E/, and increases the f/sub T/ compared with a mono-emitter. SiGe:C HBTs with f/sub T/=230GHz and BV/sub CEO/=1.8V have been realised using a metal emitter in a self-aligned integration scheme.

An improved method for determining the inversion layer mobility of electrons in trench MOSFETs

For the first time trench sidewall effective electron mobility (/spl mu//sub eff/) values were determined by using the split capacitance-voltage (CV) method for a large range of transversal effective field (E/sub eff/) from 0.1 up to 1.4 MV/cm. The influences of crystal orientation, doping concentration and, for the first time, temperature were investigated. In conclusion, the results show that (1) the split CV method is an accurate method for determining /spl mu//sub eff/(E/sub eff/) data in trench MOSFETs, (2) the {100} /spl mu//sub eff/ data approach published data of planar MOSFETs for high E/sub eff/ and (3) the mobility behavior can be explained with generally accepted scattering models for the entire range of E/sub eff/. The results are important for the optimization of trench power devices.

Analysis of the Kirk effect in silicon-based bipolar transistors with a nonuniform collector profile

In this paper, the Kirk effect has been analyzed for silicon-based bipolar transistors (BJTs) with a nonuniform collector profile. We show that, for any arbitrary collector doping profile, the Kirk effect starts when the electron concentration equals the average doping concentration in the depletion region. We present a basic guideline for determining the collector current density at the onset of Kirk effect (J/sub K/) for any collector doping profile and simple expressions for J/sub K/ and the electrical field in the collector drift region for the case of a linearly graded collector drift region. These analytical expressions are verified with device simulations. The Kirk effect for this kind of transistor is substantially different from that presented previously for transistors having a uniform collector drift region. For example, the possibility of the onset of the Kirk effect in a partially depleted collector occurs, while in a uniform collector profile the effect can only occur in a fully depleted collector. Our expressions can be used to do approximate analytical calculations for optimizing future BJTs.

Optimisation of N-Channel Trench MOS for Power Applications

The motivation of the continuous downscaling of power MOS is to attain a low on-resistance (Rds,on) for a certain breakdown voltage (BVds). Trench MOS is becoming more important for power applications below 100V. For the first time guidelines are established for obtaining an optimum trade-off between BVds and Rds,on in the voltage range up to 100V. It is shown by using simulations that for low-voltage (LV) devices <50V downscaling of the conventional device geometry is important while for high-voltage (HV) devices >50V the vertical RESURF concept in the drain is important.

Record-low 4 m/spl Omega//spl middot/mm/sup 2/ specific on-resistance for 20V trench MOSFETs

A process is shown by which both the specific on-resistance R/sub ds,on/ and the gate-drain charge density Q/sub gd/ can be reduced. Reduction of the R/sub ds,on/ is achieved by optimizing the channel profile (p-body) towards a more box-shaped profile. The Q/sub gd/ is reduced by going to smaller trench dimensions below the I-line lithography limits, without using deep-UV lithography. For polygonal cell structures, it is shown that narrowing the trenches also gives further R/sub ds,on/ reduction. Record values for R/sub ds,on/ of 4 m/spl Omega//spl middot/mm/sup 2/ (at V/sub gs/=10V) have been obtained for a 20V Trench MOSFET with a 2 /spl mu/m cell pitch. Furthermore, for a conventional 30V Trench MOSFET, we obtained an R/sub ds,on/ of 7 m/spl Omega//spl middot/mm/sup 2/ (at V/sub gs/=10V) by a more box-shaped p-body profile.