Ricardo Doldán

A tissue impedance measurement chip for myocardial ischemia detection

In this paper, the design of a specific integrated circuit for the measurement of tissue impedances is presented. The circuit will be part of a multi-micro-sensor system intended to be used in cardiac surgery for sensing biomedical parameters in living bodies. Myocardium tissue impedance is one of these parameters which allows ischemia detection. The designed chip will be used in a four-electrode based setup where the effect of electrode interfaces are cancelled by design. The chip includes a circuit to generate the stimulus signals (sinusoidal current) and the circuitry to measure the magnitude and phase of the tissue impedance. Several integrated circuits have been designed, fabricated and tested, in a 0.8-/spl mu/m CMOS process, working at 3 V of power supply. Some of them including building blocks, and other with the whole measurement system. Experimental tests have shown the circuit feasibility giving expected results for both in-vitro and in-vivo test conditions.

A 1.2V 5.14mW quadrature frequency synthesizer in 90nm CMOS technology for 2.4GHz ZigBee applications

A low-cost 1.2 V 5.14 mW phase-lock loop (PLL) quadrature frequency synthesizer compliant with the 2.4 GHz ZigBee standard (IEEE 802.15.4) has been implemented in 90 nm CMOS technology. In-phase and quadrature (I/Q) components exhibit a phase noise of -105.9 dBc/Hz at 1 MHz offset from the carrier. The PLL die area including decoupling capacitors and testing buffers is 209times422 mum2.

A continuous-time incremental analog to digital converter

In this paper an incremental analog-to-digital converter (ADC), designed as part of the signal-conditioning circuitry for a tissue impedance measurement system, is presented. Continuous-time design techniques have been used for the development of a modified implementation of the conversion algorithm, with respect to its discrete-time counterpart. In order to reduce the influence of the nonidealities, analog and digital corrections have been also implemented. A first prototype in 0.8 /spl mu/m CMOS technology has been fabricated and tested. Simulation and experimental results are reported.

Power optimization of CMOS programmable gain amplifiers with high dynamic range and common-mode feed-forward circuit

A 1.2V 1.95mW low-power Programmable Gain Amplifier (PGA) with high-input range is proposed and implemented in a 90nm CMOS process. The PGA is formed by three stages with a bandwidth of 20MHz for a 2pF capacitive load. Gain is in the range between 0 and 72dB in steps of 6dB. The stage core consists in a differential super-source follower (SSF) with programmable resistive degeneration. Each stage uses a front-end capacitive decoupling network which allows a robust selection of the operating point for improving linearity and reducing power. Further power saving is achieved with a common-mode feed-forward circuit (CMFFC), based on a simple current conveyor. The total PGA area is 165×33µm2 in a 90nm CMOS process. Post-layout simulations at maximum gain show a THD of −57dB and −42dB for output amplitudes of 0.6Vpp and 1.2Vpp, respectively. Input referred noise is just 10.2nVrms/√Hz from 1MHz to 4MHz.

Analysis of steady-state common-mode response in differential LC-VCOs

This paper analyzes the common-mode response of LC voltage-controlled oscillators (VCOs) in DC and periodic steady state regimes. The dependence of the common-mode voltage (vcm) on the oscillation amplitude is theoretically studied. Closed and simple expressions for vcm suitable for the VCO design and optimization are derived. The agreement with transistor level simulations has been verified in a 1.2V low-power 90nm CMOS case of study.

On-chip biased voltage-controlled oscillator with temperature compensation of the oscillation amplitude for robust I/Q generation

In this work a CMOS 1.2V 5GHz low-power voltage-controlled oscillator (VCO) is proposed. It uses an on-chip biased LC-tank topology and introduces a temperature compensation technique which stabilizes the oscillation amplitude for a robust I/Q generation using a frequency divider-by-2. Compared to a standard design with constant bias, it reduces the oscillation variation by almost two orders of magnitude between 0°C and 100°C with negligible impact on the phase noise. Worst case estimations of the VCO phase noise after layout parasitic extraction are −110.1dBc/Hz and −126.6dBc/Hz at 1MHz and 5MHz offsets from the carrier, respectively. Its nominal current consumption is 198μA (plus 22.5μA for biasing) and it occupies 370×530μm2.

Inductor characterization in RF LC-VCOs

This paper analyzes the characterization of inductors in resonant radio frequency (RF) circuits, with emphasis in LC voltage-controlled oscillators (VCOs). We will demonstrate how inductor quality factor is often underestimated in the vicinity of self-resonance frequency, because its capacitive parasitic contribution is not properly considered. In consequence, some valid inductor geometries could be incorrectly discarded during the initial circuit optimization process. To overcome this design space limitation, the paper presents an alternative method to characterize inductors at the wanted resonant frequency. The comparison between the conventional and the proposed methods is illustrated with the characterization of a complete inductor library in a commercial 90nm CMOS RF technology.

Mixed-mode simulation of optical-based systems: PSD application

This paper reports a new model for electrical simulation of photodetector cells, that includes its complete dynamics, and enables full system characterization, both optical and electrical parts by using the same simulation environment (Spectre in our case). The modelling of the optical parts presented in this work allows the designer to change parameters such as incident spot position and optical power, speed in spot position, photodevices responsivity, pixel fill-factor, etc. The paper presents the design and the simulation-based verification of a Position Sensing Detection (PSD) system for applications with resolutions in the micrometer range and with spot movement tracking operation originated in a DNA sensing process.