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Dive into the research topics where Robin W. Cheung is active.

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Featured researches published by Robin W. Cheung.


international reliability physics symposium | 1987

Structure and Frequency Dependence of Hot-Carrier-Induced Degradation in CMOS VLSI

C.C. Yao; Joseph Tzou; Robin W. Cheung; Hugo W. K. Chan; Cary Y. Yang

When the p-channel MOSFET is stressed near the maximum substrate current Isub, the lifetime t follows t = A(l/Isub)(Isub/Id)¿2 Experimental data show that the surface-channel PMOS transistor has more severe hot-carrier-induced degradation than the buried-channel transistor. Results of DC stress and AC stress (pulsed gate) in NMOS transistors are compared. The device lifetime under DC and AC stresses shows different Isub dependence.


international reliability physics symposium | 1986

Temperature Dependence of CMOS Device Reliability

C.C. Yao; Joseph Thou; Robin W. Cheung; Hugo W. K. Chan

This paper presents experimental results on the temperature dependence of CMOS device reliability in topological scaling. The latch-up characteristics as functions of temperature, substrate material, and device geometry are reported based on a twin-tub CMOS technology. The trade-off between the advantage of a higher device transconductance in scaled CMOSFETs and the associated reliability constraints due to the hot-carrier-induced device degradation is studied in a wide temperature range. The n-channel LDD MOSFET lifetime is observed to follow t = (A/Id) (Isub/Id)¿2.7 from room temperature to 77 K, where A is a temperature-dependent coefficient with an activation energy of 39 mev. The temperature dependence of the generation of the oxide charge is described. A correlation between the positive charge generated at high injection level and the oxide breakdown is identified.


Multilevel Interconnection: Issues That Impact Competitiveness | 1993

Confinement effects of oxide overlayers on the stress and yield behavior of Al alloys

Steven G.H. Anderson; I. S. Yeo; D. Jawarani; Paul S. Ho; Sesh Ramaswami; Robin W. Cheung

The effect of oxide confinement on the stress and yield behavior of AlCuSi and AlCu films on oxidized Si substrates have been measured by bending beam techniques and examined using a film strength model. Our results reveal that the oxide thickness, alloy thickness, and metal grain size play a role in determining the plastic deformation behavior of the metal films above approximately 200 degree(s)C. The stress analysis of multilayers for bending beam measurements has been extended to include plastic deformation, making it possible to directly determine the effects of the oxide overlayer on the stress and yield behavior of the Al alloy film. Complementary transmission electron microscopy (TEM) studies of the Al alloy reveal that differences in the grain size with and without a SiO2 passivation layer are central to determining whether an increase in film strength due to the passivation oxide will be observable. The overall experimental results, particularly the contrasting effects observed for AlCuSi and AlCu films, can be satisfactorily accounted for by a film strength model which takes into account the roles of film thickness, oxide thickness, and grain size in controlling the yield strength.


Archive | 1994

Simplified dual damascene process for multi-level metallization and interconnection structure

Richard J. Huang; Angela Hui; Robin W. Cheung; Mark S. Chang; Ming-Ren Lin


Archive | 1997

Pulse electroplating copper or copper alloys

Valery Dubin; Chiu Ting; Robin W. Cheung


Archive | 1999

Method for filling a dual damascene opening having high aspect ratio to minimize electromigration failure

Robin W. Cheung; Sergey Lopatin


Archive | 1998

Method of electroplating a copper or copper alloy interconnect

Takeshi Nogami; Valery Dubin; Robin W. Cheung


Archive | 1995

Landing pad technology doubled up as local interconnect and borderless contact for deep sub-half micrometer IC application

Richard J. Huang; Robin W. Cheung; Rajat Rakkhit; Raymond T. Lee


Archive | 1994

Method of decreased interlayer dielectric constant in a multilayer interconnect structure to increase device speed performance

Mark S. Chang; Robin W. Cheung


Archive | 1996

Processing techniques for achieving production-worthy, low dielectric, low interconnect resistance and high performance ICS

Robin W. Cheung; Mark S. Chang

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Lu You

Advanced Micro Devices

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