Simon S. Chan

Method for forming conformal barrier layers

TUNNELING TECHNOLOGY FOR REDUCING INTRA-CONDUCTIVE LAYER CAPACITANCE

Surface treatment of low-K SiOF to prevent metal interaction

Method for forming a dual damascene trench and underlying borderless via in low dielectric constant materials

Method for reducing electromigration in a copper interconnect

Dummy patterning for semiconductor manufacturing processes

Dual damascene arrangement for metal interconnection with low k dielectric constant materials in dielectric layers

Method of forming a dual damascene trench and borderless via structure

Silicide MOSFET architecture and method of manufacture

Low rc interconnection