Roger A. Dufresne

Abrupt current increase due to space-charge-limited conduction in thin nitride–oxide stacked dielectric system

In this article, the conduction mechanisms in nitride–oxide stacked structures on Si are investigated experimentally and theoretically. Amorphous silicon nitride films (3–5 nm thick) were deposited by low-pressure chemical vapor deposition. The ultrathin oxide layers (1–1.5 nm thick) were formed by reoxidization of the nitride layer at about 900 °C in wet ambient. The current–voltage characteristics for negative and positive gate polarities are asymmetric. An abrupt current increase under negative gate bias prior to dielectric breakdown is reported for this structure. This current–voltage phenomenon is attributed to trap-controlled single-carrier steady-state space-charge-limited conduction—the solid state analog of space-charge-limited current in a vacuum diode. Details of space-charge-limited conduction parameters depend on the thickness of the dielectric film and temperature. The study of those parameters can yield information about the traps inside nitride–oxide films. Such information can provide con...

New breakdown data generation and analytics methodology to address BEOL and mol dielectric TDDB process development and technology qualification challenges

Both MOL PC-CA spacer dielectric and BEOL low-k dielectric breakdown data are commonly convoluted with multiple variables induced by process steps such as lithography, etch, CMP, cleaning, and thin film deposition. The traditional method of stressing one DUT per die or multiple DUTs per die, without careful data deconvolution, is incapable of addressing current complex MOL PC-CA and BEOL low-k dielectric breakdown modeling challenges. In this paper, a new big data generation method plus an analytics procedure method is proposed to soundly evaluate both MOL and BEOL dielectric time-dependent-dielectric breakdown data. A new diagnostic reliability concept is for the first time proposed for comprehensive process diagnostics and more accurate reliability failure rate determination.

New electrical testing structures and analysis method for MOL and BEOL process diagnostics and TDDB reliability assessment

Both MOL PC-CA spacer dielectric and BEOL low-k dielectric breakdown data are commonly convoluted with multiple variables present in the data due to the involvement of many process steps such as lithography, etch, CMP, cleaning, and thin film deposition. With the continuing aggressive scaling of device dimensions and introduction of new device configurations, how to accurately analyze such complicated lateral dielectric breakdown data from MOL and BEOL TDDB in advanced VLSI circuits has become very challenging. In this paper, a new electrical method is developed to accurately characterize different variables in MOL and BEOL dielectric breakdown. This method provides a powerful way to do a fast deep dive process and reliability analysis for technology development and qualification without time consuming physical failure analysis.

Photo-enhanced negative differential resistance and photo-accelerated time-dependent dielectric breakdown in thin nitride-oxide dielectric film

Photo-enhanced negative differential resistance (NDR) and photo-accelerated time-dependent dielectric breakdown (TDDB) were observed in thin nitride–oxide (N–O) dielectric film biased with gate negative under tungsten lamp illumination. The photo-induced leakage current and photo-accelerated TDDB show dramatic asymmetry under negative and positive gate bias with constant photo-illumination. Our experiments suggest a unique current conduction mechanism in this nitride thin film. A two-carrier conduction induced positive feedback transport process under negative gate bias, and a two-carrier conduction induced self-limiting transport process under positive gate bias are proposed to qualitatively explain the experimental data. The nitride thin film device possessing a light-enhanced NDR can be employed to develop Si-based optoelectronic devices such as switching and logic control.

Diagnostic electromigration reliability evaluation with a local sensing structure

EM reliability evaluations generally rely on monitoring an EM test structure resistance increase caused by void formation during current stress. With technology scaling, the height and width of interconnects are shrinking. Therefore, the base resistance of EM test structures increases substantially, and the detection of the absolute resistance change caused by the same size of void at the latest technology nodes becomes very challenging. In this paper, an improved EM test structure based on a local resistance sensing concept is developed and evaluated. With this new test structure and associated method, the location of local void formation can be electrically determined, the details of void evolution can be more fully characterized, and a great improvement of void detection sensitivity can be achieved.

Temperature dependence of TDDB voltage acceleration in high-κ/ SiO 2 bilayers and SiO 2 gate dielectrics

In this work, experimental evidence of time-to-breakdown power-law voltage acceleration for high-κ/SiO2 bilayer dielectrics is presented. The temperature dependence of voltage acceleration power-law exponents for high-κ/SiO2 bilayer stressed in pFET inversion is found to be comparable to those of SiO2 dielectrics. In addition, the temperature-dependence of voltage acceleration for progressive BD mode is reported. On the other hand, we present a thermally assisted hydrogen release-reaction model which can explain three key experimental observations: (1) the temperature dependence of voltage acceleration exponents, (2) the non-Arrhenius temperature dependence of TDDB, and (3) the large activation energy at high temperatures.