Alvin W. Strong

Polarity-dependent oxide breakdown of NFET devices for ultra-thin gate oxide

The polarity-dependent oxide breakdown of NFET devices has been carefully studied for ultra-thin gate oxides. The measurement of charge-to-breakdown, Q/sub BD/, is found to be consistently lower for the gate injection mode than that of the substrate injection mode for the range of oxide thickness investigated here. On the other hand, the time-to-breakdown, T/sub BD/, of the gate and substrate injection modes, shows a crossover behavior as oxide thickness is reduced. The possible mechanisms are discussed to explain the degradation in QBD under the gate injection mode. Because of important implications for SOI technology applications, we have conducted a systematic reliability evaluation of NFET devices under the gate injection mode. Thickness, voltage, and temperature dependences of T/sub BD/(Q/sub BD/) as well as for the Weibull slopes have been extensively characterized. The results of these studies indicate that the trend in these dependencies is very similar to what was previously found for the substrate injection mode, such as the power-law T/sub BD/ voltage dependence and temperature-independent voltage acceleration.

Constant-Current Wafer-Level Electromigration Test: Normalization of Data for Production Monitoring

Reliability monitoring is an important part of process control in high-volume production. For metallization, a wafer-level electromigration (WL-EM) test is usually the method of choice to get a good indication of process variation. Different WL-EM methods have been reported, including a constant current method, the SWEAT test, the isothermal test, and the breakdown energy of metal test. The method used in this paper uses the ramping procedure for the isothermal test to achieve the target temperature, but then hold the current constant without feedback correction once the target temperature has been achieved. We present practical normalization procedures to ensure an appropriate wafer-to-wafer comparison that is independent of variation in cross-sectional area as well as of the initial resistance spread. The measurements were performed on a commercially available 200-mm multiside probe station using custom software to implement the current ramp and resistance measurement. Test conditions were achieved through Joule heating; the test structures used were 800-mum-long single lines (no vias) in metal 1 to metal 3, varying in width from 0.14 to 10 mum. Due to variations in the hardware and in the temperature coefficient of resistance (TCR), several normalization steps (described below) were necessary in demonstrating reasonable and expected trends in the data. Results of the analysis suggest that the appropriate value for the current density exponent for this test methodology is two, and they also verify that the TCR varies with linewidth, decreasing as linewidth decreases.

Photo-enhanced negative differential resistance and photo-accelerated time-dependent dielectric breakdown in thin nitride-oxide dielectric film

Photo-enhanced negative differential resistance (NDR) and photo-accelerated time-dependent dielectric breakdown (TDDB) were observed in thin nitride–oxide (N–O) dielectric film biased with gate negative under tungsten lamp illumination. The photo-induced leakage current and photo-accelerated TDDB show dramatic asymmetry under negative and positive gate bias with constant photo-illumination. Our experiments suggest a unique current conduction mechanism in this nitride thin film. A two-carrier conduction induced positive feedback transport process under negative gate bias, and a two-carrier conduction induced self-limiting transport process under positive gate bias are proposed to qualitatively explain the experimental data. The nitride thin film device possessing a light-enhanced NDR can be employed to develop Si-based optoelectronic devices such as switching and logic control.

Leakage current and reliability evaluation of ultra-thin reoxidized nitride and comparison with silicon dioxides

In this work, we have conducted a systematic investigation of leakage current and reliability for re-oxidized nitride, both in planar films and deposited in the deep trenches for DRAM storage-capacitor applications. It was found that for the same equivalent thickness (Teq), the leakage current of re-oxidized nitride is anomalously higher than that of SiO/sub 2/. We demonstrate that this increase in leakage current is caused by a reduction of oxide barrier height from -3 eV to -2.2 eV. In addition, the species release and injection process at the anode, by the energetic electrons, is greatly enhanced by the barrier-height reduction. Within the framework of the current understanding of oxide breakdown, this reduction in oxide barrier-height can self-consistently explain the breakdown data in reoxidized nitride films in many aspects: 1) T/sub BD/ polarity and thickness dependence; 2) the disappearance of T/sub BD/ polarity dependence for thinner films; 3) a much stronger T/sub BD/ (Q/sub BD/) thickness dependence causing a crossover effect in comparison with SiO/sub 2/. This result suggests that the defect generation rate in reoxidized nitride is thickness dependent. Using a cell-based analytical model, we found that the critical defect density at breakdown extracted from the thickness dependence of Weibull slopes is higher than SiO/sub 2/. The similarities and differences in T/sub BD/ (Q/sub BD/) voltage- and temperature dependences between reoxidized nitrides and silicon dioxides are discussed. As compared to reoxidized nitride, it is shown that high quality SiO/sub 2/ can offer a thickness scaling option for storage capacitors assuming silicon dioxide can be successfully fabricated in deep trenches with sufficiently low defect density as required by DRAM applications.

Dielectric step stress and life stress comparison

Voltage life-stress results have been compared with voltage step stress results. The figure of merit chosen for this comparison was TDDB. Two different oxides were used, one having a thickness of 13.5 nm and the other having a thickness of 8.2 nm.

Practical considerations for Wafer-Level Electromigration Monitoring in high volume production

Reliability monitoring is an important part of process control in high volume production. For the back end of line (BEOL), a wafer-level electromigration (WL-EM) test is usually the method of choice to get a good indication of process variation (Schuster, 2001). In this work we present practical normalization procedures to ensure an appropriate wafer to wafer comparison which is independent of variation in cross-sectional area as well as of the initial resistance spread. The measurements have been performed on a commercially available 300mm multi-side probe station, using custom-made software to implement the current ramp and resistance measurement. The test conditions were achieved through Joule heating; the test structures used were 800mum long single lines (no vias) in metal 1 to metal 3, varying in width from 0.14mum to 10mum. After several normalization steps described in this paper we found a strong activation energy dependence on line width. This dependence was linked to issues in temperature investigation using a constant TCR value. Additionally we found a simple way to estimate the current density exponent by optimizing the Arrhenius relation. Overall a comprehensive guideline for constant current WL-EM is presented

Characteristics of intrinsic breakdown of thin reoxidized nitride for trench capacitors

Abstract Charge trapping and intrinsic breakdown characteristics of ultra-thin reoxidized-nitride with deep-trench capacitor structures for a range of voltages and temperatures were investigated. Strong polarity dependence of time-dependent-dielectric-breakdown (TDDB) was found. A physical model is proposed for the first time to relate the asymmetric charge injection and trapping to this intrinsic breakdown characteristics in thin reoxidized-nitrides.

Modeling interconnect behavior with a calibrated FEM model

As dimensions continue to shrink and device densities increase, power and heat dissipation become an ever-increasing challenge. In this work, we investigate heat flow ramifications for a variety of very simple patterns. We start by describing the use of a finite element method (FEM) tool. This includes a brief description of the modeling procedure. The model results, for a given set of boundary conditions, are then compared to the physical measurements for that structure. Excellent agreement is demonstrated, thus calibrating the model. We then extend this model to structures for which we have no physical measurements. As importantly, we extend this model to structures and patterns that may be desirable for the next generation.

Gate reliability comparison of 110 and 100 substrates

We report, for the first time, intrinsic reliability of SiO/sub 2/ grown on 100 and 110 substrates. The tunneling current characteristics and barrier height have been analyzed. Three different processes were used to fabricate 6 nm-7 nm gates. In each case, little difference was observed in the gate oxide reliability for the two substrate orientations. The results are explained in terms of the tunneling current and the barrier height.