Sandeep Tonapi

Voids in thermal interface material layers and their effect on thermal performance

One of the key challenges in the thermal management of microelectronic devices is interfaces such as those between the chip and heat spreader and between the heat spreader and heat sink or cold plate. Typically, thermal interfaces are filled with materials such as thermal adhesives and greases. Interface materials reduce the contact resistance between the mating heat generating and heat sinking units by filling voids and grooves created by the nonsmooth surface topography of the mating surfaces, thus improving surface contact and the conduction of heat across the interface. With shrinking thermal budgets, the role of these layers in the cooling of microelectronic devices has become more critical. Voids in thermal interface material (TIM) layers may be trapped during the flow of the TIM during assembly, due to outgassing during the curing process, or due to insufficient volume. The negative effect of such voids on the thermal resistance of a TIM layer can be devastating. In applications where the TIM performs the function of a structural adhesive, voids may negatively affect the adhesion strength and reliability of the TIM layer. In this work, the effect of voids and their characteristics on the thermal performance of thermal interface adhesive layers is reported.

Random network percolation models for particulate thermal interface materials

Thermal interface materials (TIMs) are widely used in the microelectronics industry to adequately expel the waste heat generated in the chips, by reducing the contact resistance between the chip and the heat sink. A critical need in developing these TIMs is apriori modeling using fundamental physical principles to predict the effect of particle volume fraction and arrangements on effective behavior. Such models enables one to optimize the structure and arrangement of the material. The existing analytical descriptions of thermal transport in particulate systems under predict (as compared to the experimentally observed values) the effective thermal conductivity since these models do not accurately account for the effect of inter-particle interactions, especially when particle volume fractions approach the percolation limits of approximately 50% - 60%. Another crucial drawback in the existing analytical as well as the network models is the inability to model random size distributions of the filler material particles, which is what one obtains when particulates are produced. While mil-field simulations (using the finite element method) are possible for such systems, they are computationally expensive. In the present paper, we develop efficient network models that capture the inter-particle interactions and also allow random size distributions. Fifteen microstructural arrangements of alumina as well as aluminum particles in silicone matrix were first experimentally characterized. Microstructures that are representative of the experimentally tested systems were simulated using a drop-fall-shake algorithm implemented in Java. Thirty such microstructural arrangements were evaluated through both full field simulations as well as the network models. In all cases, it is shown that the full-field simulations of effective behavior are accurate to within 10% of the experimentally measured values and the random network models are accurate to within 10% of the full field simulations. The random network models were efficient since they required a few minutes to run, while the full field simulations required 4-5 hours on an average to complete

Micron and Submicron-Scale Characterization of Interfaces in Thermal Interface Material Systems

One of the key challenges in the thermal management of electronic packages are interfaces, such as those between the chip and heat spreader and the interface between a heat spreader and heat sink or cold plate. Typically, thermal interfaces are filled with mate-rials such as thermal adhesives and greases. Interface materials reduce the contact resistance between the mating heat generating and heat sinking units by filling voids and grooves created by the nonsmooth surface topography of the mating surfaces, thus improving surface contact and the conduction of heat across the interface. However, micron and submicron voids and delaminations still exist at the interface between the interface material and the surfaces of the heat spreader and semiconductor device. In addition, a thermal interface material (TIM) may form a filler-depleted and resin-rich region at the interfaces. These defects, though at a small length scale, can significantly deteriorate the heat dissipation ability of a system consisting of a TIM between a heat generating surface and a heat dissipating surface. The characterization of a freestanding sample of TIM does not provide a complete understanding of its heat transfer, mechanical, and interfacial behavior. However, system-level characterization of a TIM system, which includes its freestanding behavior and its interfacial behavior, provides a more accurate understanding. While, measurement of system-level thermal resistance provides an accurate representation of the system performance of a TIM, it does not provide information regarding the physical behavior of the TIM at the interfaces. This knowledge is valuable in engineering interface materials and in developing assembly process parameters for enhanced system-level thermal performance. Characterization of an interface material between a silicon device and a metal heat spreader can be accomplished via several techniques. In this research, high-magnification radiography with computed tomography, acoustic microscopy, and scanning electron microscopy were used to characterize various TIM systems. The results of these characterization studies are presented in this paper. System-level thermal performance results are compared to physical characterization results.

Full-Field Simulations of Particulate Thermal Interface Materials: Separating the Effects of Random Distribution from Interfacial Resistance

The effective behavior of particulate thermal interface materials depend, in addition to particle/matrix conductivities and volume loading of the particles, on the randomness of distribution, on the randomness of the size as well as on the interfacial thermal resistance between the particles and matrix. However, the relative contributions of these effects have not been identified in the literature with sufficient clarity owing to a lack of realistic simulations of these systems. In this paper we present a computationally efficient analysis procedure to simulate realistic three-dimensional microstructures of thermal interface materials. The computational procedure is based on constructing complex behavioral fields through Boolean operations (compositions) on primitive fields. It is demonstrated that the Boolean operations and an associated meshless implementation efficiently model topological changes caused by the modification/rearrangement of the second phases in the heterogeneous material microstructure. The developed method was applied to evaluate the effective thermal conductivity of the thermal interface material. Thirty three-dimensional simulations of random arrangements of the heterogeneous microstructure at a fixed 58% volume fraction were carried out. The microstructures were systematically characterized using void nearest surface exclusion probability functions. The results of the simulation range within 10% of the fifteen experimentally measured values of an identically constituted system. We demonstrate that in the absence of simulations of realistic microstructures, non-physical thermal interface resistance values may have to be assumed to describe the effect of random distributions of particles

A parametric study of a typical high power LED package to enhance overall thermal performance

LED is the revolution in the illumination industry due to its great performance of solid state lighting, environment friendly working, power saving and long lasting life. But dissipation of heat generated and subsequently the thermal management in the LED package is a challenge. A steady state thermal analysis of a typical high power LED model with power dissipation values ranging from 1- 3W, consisting of LED chip, submount, heat slug and silicone enclosure is carried out in order to minimize the junction temperature of LED system. A three dimensional finite element model of the LED package is solved numerically and simulated using ANSYS Workbench to fulfill the purpose. Junction temperature is a critical parameter which affects the efficiency, reliability and lifetime of the LED. In order to minimize the junction temperature, a parametric study is carried out. This study consists of critical geometric parameters such as size of the die, thickness of the submount adhesive, width and thickness of lead frame and height of encapsulation as well as thermal properties of die attach, submount adhesive and encapsulation covering most common adhesive, die attach and encapsulant materials. Recommendations are provided regarding both geometric and process parameters to minimize the junction temperature which will improve the overall reliability and performance of the LED package.

Utilization of carbon fibers in thermal management of microelectronics

Power dissipation is expected to increase exponentially to 150-250 W per chip over the next decade. To manage this large heat output, it is necessary to minimize the thermal resistance between the chip and a heat dissipation unit that the device is attached to. It is therefore important to further improve the thermal performance of thermal interface materials (TIMs), which can be achieved through 1) improvement of the bulk thermal conductivity of TIMs; and/or 2) reduction of interfacial thermal resistances between the TIM and the device and/or TIM and the heat dissipation unit. The latter improvement may be obtained by enhanced physical properties of TIMs (e.g., viscosity or wetting ability) and/or surface modification of the heat dissipation unit or the inactive side of the device. Researchers have tried to take advantage of the high 1D thermal conductivities of graphite fibers, and more recently of carbon nanotubes (CNT), to reduce the thermal resistance between the chip and the heat dissipation unit. The efforts can be classified into three categories: 1) Forming pre-aligned graphite fiber or CNT films that have high bulk thermal conductivities in the heat transport direction, and applying such films as TIMs; 2) incorporating randomly oriented graphite fibers or CNT into silicone or epoxy matrices in the presence or absence of a second filler to improve bulk thermal conductivities, and applying the thus-formed blend as thermal greases, or adhesives or gels; and 3) growing CNT or graphite fibers from the heat sink/spreader surface and/or silicon backside and assembling them together with a TIM a to increase the bulk heat transport property and reduce the interfacial resistances, In this paper, we will present results for each of the three approaches, and discuss the challenges facing each one.

Hierarchical Modeling and Trade-Off Studies in Design of Thermal Interface Materials

Particle laden polymer composites are widely used as thermal interface materials in the electronics cooling industry. The projected small chip-sizes and high power applications in the near future demand higher values of effective thermal conductivity of the thermal interface materials (TIMs) used between the chip and the heat-spreader and the heat-spreader and heat-sink. However, over two decades of research has not yielded materials with significantly improved effective thermal conductivities. A critical need in developing these TIMs is apriori modeling using fundamental physical principles to predict the effect of particle volume fraction and arrangements on effective behavior. Such a model will enable one to optimize the structure and arrangement of the material. The existing analytical descriptions of thermal transport in particulate systems under predict (as compared to the experimentally observed values) the effective thermal conductivity since these models do not accurately account for the effect of inter-particle interactions, especially when particle volume fractions approach the percolation limits of approximately 60%. Most existing theories are observed to be accurate when filler material volume fractions are less than 30–35%. In this paper, we present a hierarchical, meshless, computational procedure for creating complex microstructures, explicitly analyzing their effective thermal behavior, and mathematically optimizing particle sizes and arrangements. A newly developed object-oriented symbolic, java language framework termed jNURBS implementing the developed procedure is used to generate and analyze representative random microstructures of the TIMs.Copyright

Thermal management of an IGBT module using two-phase cooling

A lot of effort has been put to develop the next generation cooling technologies for Insulated Gate Bipolar Transistor module of hybrid vehicles. Two phase cooling has been identified as a potential solution for cooling of such modules. This paper explores the viability and implementation of a two phase cooling scheme and its comparison with single phase cooling. For this inverter module of Toyota Prius consisting of 12 pairs of IGBT devices and diodes is used. Thermal simulation technique is used to study the effect of convective heat transfer coefficient, cold plate dimensions, total power on IGBT, thermal interface material and its thickness on the thermal performance of the module.

Assembly and reliability of flip chips with a nano-filled wafer level underfill

The assembly and packaging of electronic devices today is becoming increasingly challenging and demanding because of requirements for smaller, faster and lighter products that provide increasing functionality at low cost. These requirements continue to place greater demands on the electronics industry and mandate improved packaging technology. In part, flip chip packaging technology is the response to these demands and provides a solution to these challenges. While flip chip packaging provides a solution to evolving device requirements, underfill materials are required to improve flip chip device reliability. These resins overcome poor device reliability issues resulting from the mismatch of coefficient of thermal expansion (CTE) between the silicon die and the organic substrate. However, offsetting the gains in device reliability are additional processing steps that adversely affect manufacturing productivity. To compensate for this adverse effect on manufacturing productivity, several new processes, such as wafer level underfill, have been developed. In this paper, we describe the assembly and reliability of flip chips with a nanofilled wafer level underfill (WLU). This approach allows application of the underfill material on the entire wafer, such that many chips can be underfilled simultaneously. Assembly is then carried out with a compatible epoxy flux material. Air-to-air thermal shock (AATS) results and failure mechanisms are described for this novel approach

Thermal characterization of the IGBT modules used in hybrid electric vehicles

In the present investigation, steady state thermal analysis of IGBT 6-pack power modules is carried out to keep maximum temperature within permissible limit. Quality and reliability of an IGBT module depends on efficient removal of the heat that is generated. A three dimensional finite element model is constructed using base plate having pins, DBC copper with a solder layer having substrate and IGBT chips. AlSiC is used as a base plate material. The thermal performance of the module is characterized by geometric and material variables of substrate, pin sizes and pin density with varying heat transfer coefficient. Commercial Finite Element Analysis software is used for the study of an IGBT module.