Sergej Makovejev

RF Extraction of Self-Heating Effects in FinFETs

Multigate semiconductor devices are celebrated for improved electrostatic control and reduced short-channel effects. However, nonplanar architectures suffer from increases of access resistances and capacitances, as well as self-heating effects due to confinement and increased phonon boundary scattering. In silicon-on-insulator (SOI) technology, the self-heating effects are aggravated by the presence of a thick buried oxide with low thermal conductivity, which prevents effective heat removal from the device active region to the Si substrate. Due to the shrinking of device dimensions in the nanometer scale, the thermal time constant that characterizes the dynamic self-heating is significantly reduced, and radio frequency extraction techniques are needed. The dynamic self-heating effect is characterized in n-channel SOI FinFETs, and the dependence of thermal resistance on FinFET geometry is discussed. It is experimentally confirmed that the fin width and the number of parallel fins are the most important parameters for thermal management in FinFETs, whereas fin spacing plays a less significant role.

Time and Frequency Domain Characterization of Transistor Self-Heating

Pulsed I-V and AC conductance or RF characterization techniques, within the time and the frequency domain, respectively, represent two approaches for evaluating self-heating in MOSFETs. In this paper, these methods are compared. Advantages and limitations of each technique are discussed and experimentally verified in silicon-on-insulator (SOI) MOSFETs. It is demonstrated that RF technique and the pulsed I-V hot chuck method agree well for the studied 130-nm-node partially depleted SOI devices. Applicability of the techniques for advanced technologies is discussed.

Wide frequency band assessment of 28 nm FDSOI technology platform for analogue and RF applications

This work presents an in-depth wide-frequency band assessment of 28 nm FDSOI MOSFETs for analogue and RF applications. The focus is mainly on such figures of merit (FoM) as the transconductance g m , the output conductance g d , the intrinsic gain A v and the cut-off frequencies f t and f max . Firstly, 28 nm FDSOI MOSFETs are compared with other advanced devices and are shown to outperform them. Secondly, g m -A v analogue metrics is demonstrated to be affected by operation frequency. Small-signal parameters variation is limited and dominated by self-heating effect. This is in contrast to the first generation of ultra-thin body and BOX devices without a ground plane where coupling through the substrate has a considerable effect. Thirdly, the self-heating effect is analysed and shown to be smaller than previously predicted by simulations for such devices. Fourthly, it is shown that f t reaches ∼270 GHz in the shortest devices.

On extraction of self-heating features in UTBB SOI MOSFETs

In this work UTBB devices with different BOX thicknesses of 10 and 25 nm are compared in terms of self-heating (SH) effect Different approaches of SH characterisation are assessed. Strengths and weaknesses of every extraction technique when applied to advanced UTBB MOSFETs are discussed. We show that while thermal effects are important even in devices with ultra-thin BOX, the resulting drain current degradation is not severe and is not considerably affected by BOX thickening from 10 to 25 nm. The main SH-related issue is output conductance degradation, which is of great importance for analogue applications.

Comparison of small-signal output conductance frequency dependence in UTBB SOI MOSFETs with and without ground plane

Ultra-thin body with ultra-thin buried oxide (UTBB) n-channel devices on silicon-on-insulator platform with and without ground plane are characterised over a wide frequency range. Self-heating effect and source-to-drain coupling through the substrate clearly manifest themselves through the output conductance variation with frequency. In this work, we experimentally show that introduction of a p-type ground plane (GP) significantly reduces output conductance degradation with frequency and results in improved analogue performance comparing with devices without GP.

Self-heating and substrate effects in ultra-thin body ultra-thin BOX devices

Self-heating and substrate effects are discussed and qualitatively compared in the ultra-thin body ultra-thin BOX (UTB2) devices without a ground plane. Ultra-thin body is aggravating thermal properties of the devices due to the interface effects. Ultra-thin BOX (10 nm) improves heat dissipation from the channel to the bulk silicon substrate but also results in strongly pronounced substrate effects. It is observed that output conductance degradation in the UTB2 devices due to the substrate effects can be as strong as degradation due to the self-heating.

RF extraction of self-heating effects in FinFETs of various geometries

Dynamic self-heating effect is characterised in n-channel FinFETs on Silicon-on-Insulator (SOI) platform. RF extraction technique is discussed and dependence of thermal resistance on fin width, number of parallel fins and fin spacing is studied.

Threshold voltage extraction techniques and temperature effect in context of global variability in UTBB mosfets

Assessment of global threshold voltage (Vth) variability in advanced silicon-on-insulator devices implies careful selection of a Vth extraction technique as different methods are sensitive to different parameters and effects. Our main focus is on experimental assessment of most widely used techniques, such as constant current, transconductance derivative and recently introduced gm/Id techniques. Some comparison with linear extrapolation methods is also provided. It is shown that gm/Id method, using data near threshold, is less sensitive to cross-impact of short channel effects (i.e. subthreshold slope and drain induced barrier lowering) variability. Therefore this method is preferred for extraction of intrinsic Vth variability without parasitic effects. Temperature evolution of global inter-die parameter variability is assessed for the first time. Possible reasons of slight variability temperature dependence are discussed.

Improvement of high-frequency FinFET performance by fin width engineering

Frequency dependent behaviour of MOSFETs arises from self-heating and source-to-drain coupling through the substrate. In this work the output conductance variation with frequency is experimentally investigated in FinFETs with various fin widths. We demonstrate that fin narrowing suppresses the output conductance degradation due to the substrate effect in the high-frequency range such that self-heating dominates the output conductance variation. The work thus emphasizes the importance of thermal management and device design in FinFETs.

Perspectives of UTBB FD SOI MOSFETs for analog and RF applications

Ultra-thin body and buried oxide (UTBB) fully depleted (FD) silicon-on-insulator (SOI) MOSFETs are widely recognized as a promising candidate for 20 nm technology node and beyond, due to outstanding electrostatic control of short channel effects (SCE). Introduction of a highly-doped layer underneath thin buried oxide (BOX), so called ground-plane (GP), targets suppression of detrimental parasitic substrate coupling and opens multi-threshold voltage (V Th ) and dynamic-V Th opportunities within the same process as well as the use of back-gate control schemes [1, 2]. Electrostatics, scalability and variability issues in UTBB MOSFETs as well as their perspectives for low power digital applications are widely discussed in the literature [1, 2, 3, 4, 5]. At the same time assessment of UTBB FD SOI for analog and RF applications received less attention. This chapter will discuss Figures of Merit (FoM) of UTBB MOSFETs of interest for further analog/RF applications summarizing our original research over the last years [6, 7, 8, 9, 10, 11, 12, 13, 14, 15]. Device analog/RF performance is assessed through the key parameters such as the transconductance, g m , the output conductance, g d , the intrinsic gain, A v and the cut-off frequencies, f T and f max. Particular attention is paid to (1) a wide-frequency band assessment, the only approach that allows fair performance prediction for analog/RF applications; (2) the effect of parasitic elements, whose impact on the device performance increases enormously in deeply downscaled devices, in which they can even dominate device performance. Whenever possible, we will compare FoM achievable in UTBB FD SOI devices with those reported for other advanced devices.