Shankar Muthukrishnan

Advances on 32nm NiPt Salicide process

The two steps RTP program for 32nm NiPt silicide formation process has been evaluated to improve source-drain resistance (Rsd), resistance uniformity and device leakage reduction behavior. A lower RTP-1 process has been investigated over the Nickel rich silicide phase formation and physical defect reduction. A higher millisecond anneal (MSA) RTP-2 has been investigated of its process window on Nickel monosilicide formation without Nickel silicide agglomeration and additional nickel piping. Then the optimized RTP program which combines a lower RTP-1 and higher RTP-2 by MSA has been demonstrated effective reduction of Nickel piping by e-beam inspection count, improved source to drain resistance (Rsd) and CMOS drive current (Ion/Ioff) improvement 4% on NMOSFET and 3% on PMOSFET, respectively.

Macroscopic and nanometer scale stress measurement of Ni(Pt)Si silicide: Impact of thermal treatments ranging from millisecond to several hours

The authors have measured and compared the stress in nickel silicide full sheet layers prepared with added platinum on (001) p-type Si wafers by using either a rapid thermal anneal (RTA) at 390u2009°C or a millisecond submelt laser dynamic scanning anneal (DSA) at 800u2009°C. The room temperature tensile stress of the silicide annealed with DSA is 1.65u2009GPa, whereas that of the silicide annealed with RTA at 390u2009°C is 800u2009MPa. Our analysis confirms that the origin of the stress lies in thermal expansion factors. Despite some small variations, the stress remains highly tensile in both layers after a 1u2009h post-treatment at 400u2009°C, with values of 1.4u2009GPa and 850u2009MPa for the DSA and RTA samples, respectively. The authors also performed strain measurements with dark field electron holography in the source drain region of 28u2009nm field complementary metal oxide semiconductor field effect transistors, under the silicide dot. They then determined the stress inside the silicide by combining the strain measurement with finite element mechanical simulations; values of 1.5u2009GPa and 600u2009MPa were found at the nanometer scale for the DSA and RTA samples, respectively, which are consistent with the macroscopic observations.

Formation of titanium silicide by Millisecond Anneal

The development of the MilliSecond Anneals (MSA) technology allows the use of short dwell time coupled with a high peak temperature in order to significantly reduce the global thermal budget. These points are fundamental in the phase transformation occurring in silicide materials: the high temperature allows the phase change and the short dwell time reduces the materials ability to diffuse and create electrical shorts and leakage. The main application using MSA for silicide steps is performed on Nickel or Nickel Platinum alloy, used in advance CMOS technology as 40 nm node and below. In this work, the capability of the Titanium to be silicided during millisecond anneal is compared to the performance of Rapid Thermal Processing (RTP) which has a high thermal budget above 750 °C for few seconds. Full sheet sample are used to compare the phase formation of TiSi2 done either by RTP or by MSA process. The phase transition is followed by Rs measurement as function of the temperature and the created phases itself were characterised by XRD. The final goal of the study is to check the integration capability of Titanium silicide by MSA in a full process flow needing very low thermal budget.

22nm node p+ junction scaling using B 36 H 44 and laser annealing with or W/O PAI

B<inf>36</inf>H<inf>44</inf> molecular dopants were implanted at 100eV and 1E15/cm² B equivalent energy and dose to achieve Xj<7nm and selected wafers also had various PAI (pre-amorphizing implantation) using Ge 10keV, Xe 14keV and In 14keV to create an amorphous layer 16–17nm deep. All the wafers were MSA (msec annealed) by DSA laser at 1175°C, 1225°C, 1275°C and 1325°C and the results show that the Rs and Bss values for B<inf>36</inf>H<inf>44</inf> without PAI was always better than those reported using monomer B and BF<inf>2</inf> with MSA even though the retained dose was only 67% compared to 100% for monomer B and 55% for BF<inf>2</inf> and we noted that the surface oxide directly affects the retained dose. Adding Ge or In PAI had no effect on dopant activation due to the self-amorphization effects of B<inf>36</inf>H<inf>44</inf> however, Xe-PAI improved activation by 20% but degraded junction leakage. In-PAI also had the highest lifetime. However, we noted that Xe-PAI behaves differently compared to Ge-PAI and In-PAI, TW values were always much higher and independent of the anneal technique (MSA, spike/RTA or furnace anneal) even though no defects could be detected by X-TEM suggesting uniform distribution of vacancy cluster defects throughout the amorphous region.

Integration of millisecond and spike anneals for dopant activation optimization

The effects of anneal sequences (ms anneal followed by spike anneal vs. spike anneal followed by ms anneal) were explored. Substantial anneal sequence effects on dopant activation were also reported.

Schottky barrier height tuning using P+ DSS for NMOS contact resistance reduction

Nickel silicide (NiSi) contacts are adopted in advanced CMOS technology nodes as they demonstrate several benefits such as low resistivity, low Si consumption and formation temperature. But a disadvantage of NiSi contacts is that they exhibit high electron Schottky barrier height (SBH), which results in high contact resistance (Rc) and reduces the NMOS drive current. To reduce SBH for NMOS, we used phosphorous (P) ion implantation into NiPt silicide with optimized anneal in order to form dopant segregated Schottky (DSS). Electrical characterization was performed using test structures such as Transmission Line Model, Cross-Bridge Kelvin Resistor, Van der Pauw and diodes to extract Rc and understand the effects of P+ DSS on ΦBn tuning. Material characterization was performed using SIMS, SEM and TEM analysis. We report ∼45% reduction in Rc over reference sample by optimizing ion implantation and anneal conditions (spike RTA, milli-second laser anneals (DSA)).

22nm node n+ SiC stressor using deep PAI+C 7 H 7 +P 4 with laser annealing

We investigated n+SiCP stressors formation by C & P implantation with various amorphization techniques and using high temperature laser annealing SPE technique. Both monomer C and molecular C (C<inf>7</inf>H<inf>7</inf>) with P<inf>4</inf> implant doping was compared as well as with pre-amorphizing implants (PAI) using Ge, Xe or Sb to enhance the Csub level through SPE amorphous layer regrowth. A P dopant activation level of 4E20/cm³ and a Csub level of 1.52% for Sb-PAI+C<inf>7</inf>+P<inf>4</inf> was realized with s strain layer depth of 50nm using a 1325°C peak laser anneal temperature.