Shian-Jyh Lin

A novel trench capacitor enhancement approach by selective liquid-phase deposition

For the first time, a novel and simple trench bottle integrated process is demonstrated on dynamic random access memory (DRAM) manufacturing by selective liquid phase deposition (S-LPD) oxide. After photoresist (PR) filled into a deep trench (DT) and was recess etched at around 1.3 /spl mu/m depth, LPD oxide can be selected as a deposit onto the DT sidewall but not as a deposit on the PR surface. This S-LPD oxide is formed by using hexa-fluosilic acid (H/sub 2/SiF/sub 6/) and water without H/sub 3/BO/sub 3/. After the PR is removed, the LPD oxide becomes a protective layer on DT upper portion. Thus, the DT bottom area can be enlarged to form a trench bottle by NH/sub 4/OH wet etching. Compared to conventional DT trench, 20% of capacitance was enhanced by this S-LPD process. This novel and low-cost method is for the first time demonstrated on 200-mm wafer 110-nm trench DRAM technology.

Gate-Induced Drain Leakage (GIDL) Improvement for Millisecond Flash Anneal (MFLA) in DRAM Application

In this paper, we successfully demonstrated gate-induced drain leakage (GIDL) improvements by millisecond flash anneal (MFLA) on a DRAM product. Fundamental studies on blanket wafers and the device characteristics of product wafers showed positive results. These proved that MLFA has good potential for DRAM application. The periphery NMOS off current was reduced by 36%. This off-current improvement reduced the standby current by 5% in a DRAM functional test. The GIDL reductions for an NMOS array and periphery N- and PMOSs were 14.5%, 15%, and 39%, respectively. A model for GIDL improvement by MFLA application to DRAM production was proposed. It is believed that the main GIDL-impacted factor was the high electric field caused by defect-assisted tunneling and junction profile abruptness under the gate edge. Bright field and weak-beam dark-field TEM images showed perfect dislocation loops and fault dislocation loops staying in the {113} plane with a size of around 17 x 20 nm in the junction area. These defects could be one of the leakage sources for a defect-assisted trap charge, leading to trap-assisted tunneling.

Negative Bias Temperature Instability of p-Channel Metal Oxide Semiconductor Field Effect Transistor with Novel HfxMoyNz Metal Gate Electrodes

The negative bias temperature instability (NBTI) characteristics of p-channel metal oxide semiconductor field effect transistor (pMOSFET) devices with novel HfxMoyNz metal gates have been investigated for the first time. The threshold voltage (Vth) shift, subthreshold swing (SS), off-leakage current, and field effect mobility (µFE) were found to be degraded after NBTI stress. The possibility of nitrogen diffusing to the oxide is increased by employing a higher N2 ratio during HfxMoyNz deposition. The higher nitrogen content in HfxMoyNz metal gates shows threshold voltage (Vth) shift, subthreshold swing (SS), off-leakage current, and field effect mobility (µFE) degradation. The degradation of threshold voltage (Vth), subthreshold swing (SS), off-leakage current, and field effect mobility (µFE) are believed to be due to the interface states and fixed oxide charges generation from the broken Si–H bonds at the SiO2/Si interface. Furthermore, the mechanism of NBTI degradation has been suggested by a physical model and an energy band diagram.

Integration of Millisecond Flash Anneal on CMOS Devices for DRAM Manufacturing

We successfully demonstrate the millisecond flash anneal (MFLA) on a matured DRAM product. The GIDL improvements for array NMOS, periphery N and P MOS are 14.5%,15%, and 39% respectively. The mechanisms of GIDL impact at different process stages have been reviewed. With MFLA replacement, N and PMOS on-current (Ion) gains 4.3% and 11.8% respectively. Superior off current (Ioff) reduction for periphery N and PMOS reach 150% and 500% respectively. Vt roll- off, Vt-Ion, Ion-Ioff correlation, overlap capacitance, and drain induced barrier lowering (DIBL) have been reviewed. TEM data show poly grain enlargement and clustering defects staying at different junction depths. This study shows that MFLA has the benefit for lower thermal budget, high dopant activation, and shallow junction for sub-50 nm DRAM.

Full Range Work Function Modulation by Nitrogen Incorporation in Hf-Mo Binary Alloys Gate Electrode

in Hf–Mo Binary Alloys Gate Electrode Chao-Sung Lai, Chin-Wei Huang, Hsing-Kan Peng, Chih-Hsin Chen Yu-Ching Fang, Li Hsu, Hui-Chun Wang, Chung-Yuan Lee, Shian-Jyh Lin Department of Electronic Engineering, Chang Gung University, 259 Wen-Hwa 1 Road, Kwei-Shan Tao-Yuan 333, Taiwan Chung-Shan Institute of Science & Technology Materials & Electro-Optics Research Division 32500, Lung-Tan, Taoyuan, Taiwan 3 Nanya Technology Corporation, Hwa-Ya Technology Park, 669 Fu-Hsing 3rd Rd, Kueishan, Taoyuan, Taiwan Phone: +886-3-2118800 ext. 5786 E-mail: cslai@mail.cgu.edu.tw