Shigeru Kambayashi

Analysis of the drain breakdown mechanism in ultra-thin-film SOI MOSFETs

The drain breakdown phenomenon in ultra-thin-film (silicon-on-insulator) SOI MOSFETs has been studied. Two-dimensional simulation revealed that the thinning of the SOI film brings about an increase in the drain electric field due to the two-dimensional effect, causing a significant lowering in the drain breakdown voltage, as has been commonly seen in ultra-thin-film SOI MOSFETs. The simulation also showed that the lowered drain breakdown voltage recovered almost to its original value when the drain SOI thickness was restored, suggesting that the drain structure, rather than the source, plays a major role in determining the drain breakdown voltage. Experiments using an asymmetric device structure supported this hypothesis, showing that the breakdown voltage was mostly dependent on the drain structure, the initial potential barrier height at the source-SOI-body junction being only a minor factor. Transient simulation was also carried out to investigate the detailed breakdown process, showing that holes accumulate near the source-SOI-body junction at a high drain bias, eventually forward-biasing the junction. These results indicate that a careful drain design and/or proper choice of the SOI thickness as well as the supply voltage are quite important for realizing high performance of ultra-thin-film SOI MOSFETs. >

Diffusion and Segregation of Carbon in SiO2 Films

Diffusion of carbon in SiO2 films and its segregation at the Si/SiO2 interface were investigated using carbon-incorporated borophosphosilicateglass (BPSG) films and carbon-implanted SiO2 films. It was found that carbon atoms diffuse in SiO2 film at a temperature as low as 500° C. Carbon atoms segregated at the Si/SiO2 interface and induced positive charge. The positive charge density was proportional to the segregated carbon concentration. Field emission transmission electron microscopy (FE-TEM) and electron energy loss spectra (EELS) observations revealed that carbon atoms exist on the SiO2 side of the interface, and another carbon-rich phase is formed in SiO2.

Buried source and drain (BSD) structure for ultra-shallow junction using selective deposition of highly doped amorphous silicon

A buried source and drain (BSD) structure, that realizes ultra-shallow junctions, is proposed. Regions for source and drain are etched off. An in-situ highly doped amorphous silicon layer is selectively deposited on the etched region and is crystallized by solid phase epitaxy. Junction depth can be reduced to 10 nm without lowering the dopant concentration, because the doped layer can be used as source and drain. Thus, the sheet-resistance was lowered to 300 /spl Omega// for a junction with the depth of 30 nm. Junction leakage current for the BSD structure was equal to or lower than that fabricated by ion-implantation.

Oxide-Mediated Solid Phase Epitaxy (OMSPE) of Silicon: A New Low-Temperature Epitaxy Technique Using Intentionally Grown Native Oxide

A new low-temperature epitaxial technique is proposed, which utilizes the native oxide on the Si surface. A good quality epitaxial Si layer can be obtained using solid phase epitaxy (SPE), mediated by an intentionally grown native oxide layer on the Si substrate. Oxygen coverage of 0.25 ML was determined to be most suitable for obtaining defect-free epitaxy. The mechanism of this new epitaxial technique is presented, based on a detailed investigation of defect formation due to the oxygen at the interface.

Non-equilibrium diffusion process modeling based on three-dimensional simulator and a regulated point-defect injection experiment

Presents two novel sophisticated experimental procedures for precise estimation of Si interstitial and vacancy diffusion coefficients, supported with a result from a three-dimensional process simulation system. One is impurity profile monitoring under well-controlled injected flux of point defects in three dimensional space, while the other one is in-situ TEM (transmission electron microscope) observation of the regrowth region damaged with Si ion-implantation. The authors also present a proposal for nonequilibrium Si self-diffusion process modeling based on these results. Application of the model to the ULSI process design phase is discussed.<<ETX>>

Device performance analysis using Monte-Carlo simulator for SOI MOS transistors on solid-phase-recrystallized silicon films

A Monte Carlo simulator has been developed that can trace random nucleation and regrowth characteristics for silicon-on-insulator MOS transistors and can predict the distribution of device characteristics. Activation energies for nucleation and regrowth in solid-phase were derived to be 3.9 eV and 2.8 eV, respectively. Localized states caused by the regrowth boundary were observed as a function of regrown grain size where values were two orders of magnitude larger than for bulk MOS. Threshold voltage shift and carrier mobility could be interpreted mainly in terms of the density-of-states and boundary structure; the distribution of threshold voltage and mobility were predicted closely by the Monte Carlo simulator

A Study of Nucleation and Grain Growth in Silicon Implanted a-Silicon Films

The solid-phase-recrystallization process was investigated for Si ;lmplanted amorphous silicon fiLns. This process consists of nucleation and grain growth. The recrystallization process had two stages. The nucleation of grains was dominant at the firsE stage. Both nucleati-on and grain growth occurred at the second stage. The activation energies for nucleation and grain growth were determined by a new.statistical approach, using the number of grains and the distribution of grain size. The obtained activation eneigies for nucleation and grain growth were 5.9 eV and 2.8 eV, respectively. The rate-determining step of the grain growth seemed to be similar to that of lateral solid phase epitaxy. B-2-3

A new thin film Growth/Regrowth Process Design and Experimental Comparisons with Molecular Dynamic Analyses

A new concept of thin film growth/regrowth process design taking atomic motions into account using molecular dynamics is proposed. In the system, a modified many-body Tersoff-type interatomic potential for silicon has been adopted. The mathematical derivation of higher order derivatives was rigorously treated. Among many applications, the solid phase growth process was studied. It has been found from simulation studies that the solid phase growth of crystalline silicon proceeded along the [110] direction layer by layer. Furthermore, it has been obtained that all the atoms are activated in an extremely thin amorphous silicon film. Based on simulated results, an experiment using an extremely thin amorphous silicon film was carried out. It has been found that the perfect spherical silicon crystals with a uniform size and spacing can be grown from a thin amorphous silicon film.

9.5×9.5mm 2 -Area Recrystallization, 6μm-Viahole Filling and Thin 1/4μm CMOS SOI Designing for Realizing Three-Dimensional Integrated Circuit

Several key technologies;large-area recryatallization technique, viahole-filling, and scaled thin SOI devices, have been prepared for realizing 3D LSI.

A Band-to-Band Tunneling MOSFET Using a Thin Film Transistor

INTRODUCTION As MOSFETs have become smaller, the band-toband tunneling phenomenon, caused by gate-todrain electric field, has become significant, and many studies on this phenomenon have been reported t1-41. A new transistor mode has been proposed, which makes use of this effect, in which the drain-to-substrate band-to-band tunneling current is controlled by the gate bias [5,6]. In the experiment, a poly Si film, crystalized from an amorphous silicon film, was used as the thin film. In this paper, band-to-band tunneling is utilized in a thin film transistor and (BT)2TFT (Band-To-Band Tunneling Thin Film Transistor) operation is reported for the first time.