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Dive into the research topics where Takako Okada is active.

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Featured researches published by Takako Okada.


international electron devices meeting | 1990

Non-equilibrium diffusion process modeling based on three-dimensional simulator and a regulated point-defect injection experiment

Takako Okada; Shigeru Kambayashi; Shinji Onga; Ichiro Mizushima; Kikuo Yamabe; J. Matsunaga

Presents two novel sophisticated experimental procedures for precise estimation of Si interstitial and vacancy diffusion coefficients, supported with a result from a three-dimensional process simulation system. One is impurity profile monitoring under well-controlled injected flux of point defects in three dimensional space, while the other one is in-situ TEM (transmission electron microscope) observation of the regrowth region damaged with Si ion-implantation. The authors also present a proposal for nonequilibrium Si self-diffusion process modeling based on these results. Application of the model to the ULSI process design phase is discussed.<<ETX>>


international electron devices meeting | 2007

Study on High Performance (110) PFETs with Embedded SiGe

Shintaro Okamoto; K. Miyashita; Nobuaki Yasutake; Takako Okada; Hiroshi Itokawa; Ichiro Mizushima; Atsushi Azuma; H. Yoshimura; T. Nakayama

The effects of inversion-layer capacitance and stress-induced mobility at short channel region (Lg =35 nm) on (100) and (110) pFETs are investigated. 64 % mobility enhancement at Eeff = 1.1 MV/cm and 0.15 nm thinner inversion-layer capacitance at Eox = 4.5 MV/cm are obtained for (110) embedded SiGe (eSiGe) pFETs, compared to (100) eSiGe pFETs. Calculated results suggest that (110) eSiGe pFETs will gain additional 63% higher mobility with 1 GPa uniaxial stress by controlling surface roughness scattering at SiO2/Si(110) interface.


international conference on simulation of semiconductor processes and devices | 2010

A comparative 3D simulation approach with extensive experimental Vt/Avt data and analysis of LER/RDF/reliability of CMOS SRAMs at 40-nm node and beyond

Takako Okada; H. Yoshimura; Hisashi Aikawa; Mitsuhiro Sengoku; Osamu Fujii; Hisato Oyamatsu

With the advent of CMOS SRAMs manufactured at 40-nm node and beyond, variability of threshold voltage (Vt) and technology-dependent factor in Pelgrom plot (Avt) has become a serious issue in the practical design and fabrication phases. This paper presents (i) a comparative 3D simulation approach using extensive measured data to clarify the magnitudes of LER and RDF effects in generic processes, (ii) estimation of magnitudes of LER, RDF and FER (metallurgical junction front edge roughness) effects, (iii) simulation of LER, RDF and FER in a FinFET device to evaluate practical feasibility and (iv) analysis of size-dependent NBTI-induced Vt fluctuation as a possible application of this method.


international conference on simulation of semiconductor processes and devices | 2006

A tool development of rigorous Schrödinger/Luttinger based Monte Carlo codes for scaled MOS studies in terms of crystal orientation, channel direction, mechanical stress and applied voltage

Takako Okada

In order to study scaled devices in the 40 nm regime and beyond, it is necessary to use rigorously theoretical and physical-based TCAD tools instead of empirically or phenomenologically calibrated approaches, otherwise full development and understanding of the devices will be retarded. In view of this situation, the author has developed a prototype rigorous Schrodinger/Luttinger based Monte Carlo tool for scaled MOS device designing in terms of crystal orientation, channel direction, mechanical stress and applied voltage, while also emphasizing flexibility for device modification and reliable prediction. In this paper, detailed mathematical derivations are presented and distinctive p-channel MOS inversion characteristics for Si, SiGe, and Ge are demonstrated. Moreover, experimental results for model verifications are presented


MRS Proceedings | 1992

A new thin film Growth/Regrowth Process Design and Experimental Comparisons with Molecular Dynamic Analyses

Takako Okada; Shigeru Kambayashi; Moto Yabuki; Yoshitaka Tsunashima; Yuichi Mirata; Shinji Onga

A new concept of thin film growth/regrowth process design taking atomic motions into account using molecular dynamics is proposed. In the system, a modified many-body Tersoff-type interatomic potential for silicon has been adopted. The mathematical derivation of higher order derivatives was rigorously treated. Among many applications, the solid phase growth process was studied. It has been found from simulation studies that the solid phase growth of crystalline silicon proceeded along the [110] direction layer by layer. Furthermore, it has been obtained that all the atoms are activated in an extremely thin amorphous silicon film. Based on simulated results, an experiment using an extremely thin amorphous silicon film was carried out. It has been found that the perfect spherical silicon crystals with a uniform size and spacing can be grown from a thin amorphous silicon film.


The Japan Society of Applied Physics | 1989

A Composite lon-Implantation/Dopant Diffusion Simulation Involving Point Defect Kinetics and Its Application to Ultra Shallow Base Design

Takako Okada; Koichi Kato

This study proposes a unified process modeling for dopant diffusion in silicon based on point defect kinetics, and demonstrates a newly developed simulator which can predict point defect behavior from the ion-implantation process to the dopant diffusion process. This simulation has revealed the point defect induced enhancement effect on dopant diffusion during short time annealing after ion-implantation, and has accurately predicted the electric field effect in double diffusion of boron and arsenic by solving the Poissons equation. Furthermore, triple element diffusion of boron, arsenic, and phosphorus, necessary for shallow base design in bipolar device fabrication, was successfully predicted.


Archive | 2003

Semiconductor device and its fabricating method

Takako Okada; Shigeru Kambayashi; Moto Yabuki; Shinji Onga; Yoshitaka Tsunashima; Yuuichi Mikata; Haruo Okano


Archive | 1994

Semiconductor device with monocrystalline gate insulating film

Shinji Onga; Takako Okada; Kouichirou Inoue; Yoshiaki Matsushita; Kikuo Yamabe; Hiroaki Hazama; Haruo Okano


Archive | 1996

Semiconductor device manufacturing method, manufacturing apparatus, simulation method and simulator

Shinji Onga; Takako Okada; Hiroshi Tomita; Kikuo Yamabe; Haruo Okano


Archive | 2000

Method and apparatus for simulating manufacturing, electrical and physical characteristics of a semiconductor device

Takako Okada

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