Shou-Gwo Wuu

Light guide for pixel crosstalk improvement in deep submicron CMOS image sensor

Light guide, a novel dielectric structure consisting of PE-Oxide and FSG-Oxide, has been developed to reduce crosstalk in 0.18-/spl mu/m CMOS image sensor technology. Due to the difference in refraction index (1.46 for PE-Oxide and 1.435 for FSG-Oxide), major part of the incident light can be totally reflected at the interface of PE-Oxide/FSG-Oxide, as the incidence angle is larger than total reflection angle. With this light guide, the pixel sensing capability can be enhanced and to reduce pixel crosstalk. Small pixels with pitch 3.0-/spl mu/m and 4.0-/spl mu/m have been characterized and examined. In 3.0-/spl mu/m pixel, optical crosstalk achieves 30% reduction for incidence angle of light at 10/spl deg/.

Crosstalk improvement technology applicable to 0.14/spl mu/m CMOS image sensor

For pixel crosstalk improvement, modified logic technology with thin epi wafer thickness, thin backend process thickness and air gap guard ring technology, pixel size can be further scaled down to less than 2.8 /spl mu/m /spl times/ 2.8 /spl mu/m and maintain the same performance as 4.0 /spl mu/m /spl times/ 4.0 /spl mu/m pixel does. Greater than 65% crosstalk reduction at 10/spl deg/ incident angle has been demonstrated. This technology can be applicable to CMOS image sensor with 0.14 /spl mu/m design rules.

A leading-edge 0.9µm pixel CMOS image sensor technology with backside illumination: Future challenges for pixel scaling

This paper presents process breakthroughs that enable a BSI 0.9µm pixel formation and its performance. The technology was developed using 300mm bulk silicon starting wafers with the state-of-the-art tool set for BSI sensor processing. This is the first demonstration of 0.9µm BSI pixel with acceptable optical performance. Further improvements are in the area of crosstalk suppression and color performance enhancement for continuous pixel scaling from 0.9µm.

A high performance active pixel sensor with 0.18um CMOS color imager technology

A high performance 0.18 um CMOS image sensor technology has been successfully developed and fully characterized. 3T active pixel sensor (APS) with non-silicide source/drain process is provided to reduce dark current and increase photoresponse. By optimizing photodiode junction profile with the appropriate thermal cycle, the dark current can be drastically reduced. Small pixel pitch 2.8um/spl sim/4.0um demonstrates the low dark current (less 0.2 fA/pixel), the excellent sensitivity and dynamic range. Especially, the superior standard deviation of dark signal 8.3 mV/sec, will offer a low white pixel technology. The color pixel performance with microlens is also reported in this paper.

Air-gap guard ring for pixel sensitivity and crosstalk improvement in deep sub-micron CMOS image sensor

An air-gap guard ring around the pixel sensor, to improve pixel sensitivity and crosstalk, in 0.18 /spl mu/m CMOS image sensor technology has been successfully developed. By using the RI (refractive index) difference between the air gap (RI/spl sim/1) and dielectric films (RI=1.4/spl sim/1.6), the major incident light is collected in the targeted pixel due to the total internal reflection occurred in the air-gap/dielectric-film interface. The small pixel pitch of 2.8 /spl mu/m/spl sim/4.0 /spl mu/m has been characterized and demonstrates excellent optical performance. For a 3.0 /spl mu/m pixel, the pixel sensitivity shows 45% enhancement and optical spatial crosstalk achieves 90% reduction at 20/spl deg/ incident angle.

Active pixel image sensor scale down in 0.18 /spl mu/m CMOS technology

A high performance 0.18 /spl mu/m CMOS image sensor technology is reported in this paper. It is modified from a generic logic technology. A 64/spl times/64 3T pixel array of various pixel size from 2.8 /spl mu/m to 4.0 /spl mu/m is used to study the scale down issues. By optimizing the process flow, the image sensors with the pixel size downscaled to 2.8 /spl mu/m demonstrates the high sensitivity, low dark current, low white pixel rate and high dynamic range. Although the crosstalk effect is getting worse for smaller pixel size, the 3 /spl mu/m pixel array demonstrates an excellent color rendition capability.

High performance 0.25-um CMOS color imager technology with non-silicide source/drain pixel

A high performance 0.25 um CMOS image sensor technology has been developed to overcome device scaling and process issues. Non-silicide source/drain pixel (3 transistors, 3.3 um/spl times/3.3 um, fill factor: 28%) is provided to reduce dark current and increase photoresponse. By optimizing thermal oxide in STI structure, double ion implanted source/drain junction and using H/sub 2/ annealing, the dark current can be drastically reduced (less than 0.5 fA per pixel). The color pixel performance with microlens and related crosstalk characters are also reported in this paper. Two photodiode structures are used to characterize pixel performance. The result shows NW/Psub photodiode demonstrate reduced dark current and higher sensitivity than N+PW diode.

Dramatic reduction of optical crosstalk in deep-submicrometer CMOS imager with air gap guard ring

A dielectric structure, air gap guard ring, has been successfully developed to reduce optical crosstalk thus improving pixel sensitivity of CMOS image sensor with 0.18-/spl mu/m technology. Based on refraction index (RI) differences between dielectric films (RI = 1.4 /spl sim/ 1.6) and air gap (RI = 1), total internal reflection occurred at dielectric-film/air-gap interface, thus the incident light is concentrated in selected pixel. Excellent optical performances have been demonstrated in 3.0 /spl times/ 3.0 /spl mu/m pixel. Optical spatial crosstalk achieves 80% reduction at 20/spl deg/ incidence angle and significantly alleviates the pixel sensitivity degradation with larger angle of incident light.

Nonsilicide source/drain pixel for 0.25-/spl mu/m CMOS image sensor

A nonsilicide source/drain pixel is proposed for high performance 0.25-/spl mu/m CMOS image sensor. By using organic material spin coat and etch back, silicide is only formed on poly gate which can be used as interconnection, not for source/drain region that solve the optical opaqueness and undesirably large junction leakage of silicide. The performance of MOSFET changes little due to the high sheet resistance of nonsilicide source/drain. With H/sub 2/ annealing and double ion implanted source/drain junction, the dark current can be further reduced. The novel pixel (three transistors, 3.3 /spl mu/m/spl times/3.3 /spl mu/m, fill factor: 28%) shows low dark current (less than 0.5 fA per pixel at 25/spl deg/C) and high photoresponse.

Color mixing improvement of CMOS image sensor with air-gap-guard ring in deep-submicrometer CMOS technology

In this letter, color mixings of a CMOS image sensor with air-gap-guard-ring (AGGR) and conventional structures were investigated in 0.18-/spl mu/m CMOS image sensor technology. As the light incident angle is increased from 0/spl deg/ to 15/spl deg/, conventional pixel shows serious color mixing. For example, the maximum photo responses of blue, green1, green2, and red pixels are shifted from 490 to 520 nm, 530 to 500 nm, 530 to 600 nm, and 600 to 580 nm, respectively. However, pixels with AGGR not only keep correct spectral response without peak shift but also achieve 5%-50% crosstalk reduction, thus preventing the sensor from color mixing efficiently.