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Dive into the research topics where Shun Kawada is active.

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Featured researches published by Shun Kawada.


ieee sensors | 2009

A wide dynamic range checkered-color CMOS image sensor with IR-Cut RGB and visible-to-near-IR pixels

Shun Kawada; Shin Sakai; Nana Akahane; Rihito Kuroda; Shigetoshi Sugawa

A single-chip wide dynamic range (DR) CMOS image sensor is demonstrated with good color reproducibility imaging for the visible wave band, as well as a high sensitivity for the wide waveband coverage through visible to near infrared (Near-IR) wavebands. We succeeded in developing a checkered White-RGB (WRGB) CMOS image sensor based on the lateral overflow integration capacitor (LOFIC) architecture with optimized capacitance value for each color pixel according to its sensitivity. Using the RGB pixels with an infrared cut (IR-Cut) filter, good color reproducibility for visible lights up to a high saturation light intensity, as well as a high sensitivity performance for visible to Near-IR wavebands by using the W pixels without IR-Cut filter are obtained. The image sensor is a 1/3.3-inch optical format, 1280H × 480V pixels, 4.2-µm effective pixel pitch with pixels placed along with 45° direction WRGB LOFIC CMOS image sensor. The wide DR property is 102-dB in one exposure.


Japanese Journal of Applied Physics | 2014

A wide dynamic range CMOS image sensor with 200–1100 nm spectral sensitivity and high robustness to UV right exposure

Satoshi Nasuno; Shun Kawada; Yasumasa Koda; Taiki Nakazawa; Katsuhiko Hanzawa; Rihito Kuroda; Shigetoshi Sugawa

A highly UV-light sensitive and sensitivity robust CMOS image sensor with a wide dynamic range (DR) was developed and evaluated. The developed CMOS image sensor includes a lateral overflow integration capacitor in each pixel in order to achieve a high sensitivity and a wide DR simultaneously. As in-pixel photodiodes (PDs), buried pinned PDs were formed on flattened Si surface. The PD has a thin surface p+ layer with a steep dopant concentration profile to form an electric field that drifts photoelectrons to the pinned n layer. This structure improves UV-light sensitivity and its stability. In addition, a buried channel source follower driver was introduced to achieve a low pixel noise. This CMOS image sensor was fabricated by a 0.18-µm 1-polycrystalline silicon 3-metal CMOS process technology with buried pinned PD. The fabricated image sensor has a high sensitivity for 200–1100 nm light wave band, high robustness of sensitivity and dark current toward UV-light exposure and a wide DR of 97 dB. In this paper, the PD structures, the circuit, the operation sequence and the measurement results of this CMOS image sensor are discussed.


Proceedings of SPIE | 2013

Color reproductivity improvement with additional virtual color filters for WRGB image sensor

Shun Kawada; Rihito Kuroda; Shigetoshi Sugawa

We have developed a high accuracy color reproduction method based on an estimated spectral reflectance of objects using additional virtual color filters for a wide dynamic range WRGB color filter CMOS image sensor. The four virtual color filters are created by multiplying the spectral sensitivity of White pixel by gauss functions which have different central wave length and standard deviation, and the virtual sensor outputs of those virtual filters are estimated from the four real output signals of the WRGB image sensor. The accuracy of color reproduction was evaluated with a Macbeth Color Checker (MCC), and the averaged value of the color difference ΔEab of 24 colors was 1.88 with our approach.


Proceedings of SPIE | 2014

A 1024×1 linear photodiode array sensor with fast readout speed flexible pixel-level integration time and high stability to UV light exposure

Shun Kawada; Yasumasa Koda; Taiki Nakazawa; Rihito Kuroda; Shigetoshi Sugawa

In this paper, we demonstrate two types of new photodiode array (PDA) with fast readout speed and high stability to ultraviolet (UV) light exposure. One is a high full well capacity sensor specialized for absorption spectroscopy, the other one is a high sensitivity sensor for emission spectroscopy. By introducing multiple readout paths along the long side of the rectangle PD, both two PDAs have achieved more than 150 times faster readout speed compared with a general PDA structure with a single readout path along the short side of PD. By introducing a photodiode (PD) structure with a thin and steep dopant profile p+ layer formed on a flattened Si surface, a higher stability of the light sensitivity to UV light exposure was confirmed compared with a general PD structure for conventional PDAs.


The Japan Society of Applied Physics | 2013

A Wide Dynamic Range CMOS Image Sensor with 200-1100 nm Spectral Sensitivity and High Robustness to Ultraviolet Light Exposure

S. Nasuno; Shun Kawada; Y. Koda; T. Nakazawa; K. Hanzawa; Rihito Kuroda; S. Sugawa

A 5.6 m pixel pitch CMOS image sensor using following technologies was fabricated and evaluated. The pixels include the lateral overflow integration capacitor (LOFIC) for high sensitivity and high full well capacity (FWC) and buried channel source follower drivers for low noise. The photodiodes (PDs) are formed by a highly sensitive and highly robust to ultraviolet (UV) light technology.


Japanese Journal of Applied Physics | 2010

Pixel Scaling in Complementary Metal Oxide Silicon Image Sensor with Lateral Overflow Integration Capacitor

Shin Sakai; Yoshiaki Tashiro; Shun Kawada; Rihito Kuroda; Nana Akahane; Koichi Mizobuchi; Shigetoshi Sugawa

Two wide dynamic range (DR) complementary metal oxide silicon (CMOS) image sensors (CIS) with lateral overflow integration capacitor (LOFIC) have been developed in order to scale down the pixel size. A checker-pattern CIS has achieved high area-efficiency for the full well capacity (FWC) by introducing the rectangle structure and placing the color-filters and on-chip microlens along the direction at an angle of 45°. A shared two pixels CIS has achieved small pixel pitch by introducing a lateral overflow gate that overflows over-saturated photoelectrons from the photodiode to the LOFIC directly. These CISs were fabricated using the 0.18-µm 2-polycrystalline 3-metal CMOS technology with buried-pinned-photodiode process and achieved the high FWC, low noise, wide DR and high resolution performances. These structures are effective for obtaining the small pixel size with the advantageous characteristics of LOFIC CIS. In this paper, these structures, operation methods and measurement results of these CISs have been discussed.


Japanese Journal of Applied Physics | 2010

White–Red–Green–Blue Lateral Overflow Integration Capacitor Complementary Metal–Oxide–Semiconductor Image Sensor with Color-Independent Exposure and Widely-Spectral High Sensitivity

Shun Kawada; Shin Sakai; Yoshiaki Tashiro; Shigetoshi Sugawa

A high sensitivity white–red–green–blue (WRGB) complementary metal–oxide–semiconductor (CMOS) image sensor is proposed with color-independent saturation exposure based on lateral overflow integration capacitor (LOFIC) architecture. In case of conventional WRGB image sensors, the W pixels saturate in lower illuminance than the other pixels due to the same saturation exposure of all pixels. This WRGB LOFIC CMOS image sensor solves this problem by optimizing the size of LOFICs for each pixel color according to its sensitivity. The white (W) pixels have about 2.3 times higher sensitivity than the green (G) pixels and have 102-dB dynamic range (DR). Moreover, W pixels without infrared (IR) cut filter have high sensitivity for luminance through visible light band to near IR wave band. This image sensor realize that good color reproductivity imaging for the visible waveband and high sensitivity imaging for a wide waveband by one image sensor.


Japanese Journal of Applied Physics | 2013

A Column-Parallel Hybrid Analog-to-Digital Converter Using Successive-Approximation-Register and Single-Slope Architectures with Error Correction for Complementary Metal Oxide Silicon Image Sensors

Tsung-Ling Li; Shin Sakai; Shun Kawada; Yasuyuki Goda; Shunichi Wakashima; Rihito Kuroda; Shigetoshi Sugawa

In this paper, a column-parallel hybrid analog-to-digital converter (ADC) architecture taking the advantages of both successive-approximation-register (SAR) and single-slope (SS) architectures has been developed for CMOS image sensors. The proposed architecture achieves high conversion speed and low power consumption without requiring a high clock frequency and a large number of capacitors. Moreover, an error correction methodology has been presented to calibrate capacitance mismatches in a SAR capacitor array for linearity improvement. An 11-bit hybrid prototype ADC has been implemented in a 0.18-µm 1-poly 5-metal standard CMOS process. The conversion time is 1.225 µs with a maximum operation clock frequency of 40 MHz and it consumes 48 µW. With the proposed error correction, the measured differential nonlinearity (DNL) and integral nonlinearity (INL) are +0.40/-0.44 least significant bit (LSB) and +1.21/-1.12 LSB, respectively.


Proceedings of SPIE | 2011

A robust color signal processing with wide dynamic range WRGB CMOS image sensor

Shun Kawada; Rihito Kuroda; Shigetoshi Sugawa

We have developed a robust color reproduction methodology by a simple calculation with a new color matrix using the formerly developed wide dynamic range WRGB lateral overflow integration capacitor (LOFIC) CMOS image sensor. The image sensor was fabricated through a 0.18 μm CMOS technology and has a 45 degrees oblique pixel array, the 4.2 μm effective pixel pitch and the W pixels. A W pixel was formed by replacing one of the two G pixels in the Bayer RGB color filter. The W pixel has a high sensitivity through the visible light waveband. An emerald green and yellow (EGY) signal is generated from the difference between the W signal and the sum of RGB signals. This EGY signal mainly includes emerald green and yellow lights. These colors are difficult to be reproduced accurately by the conventional simple linear matrix because their wave lengths are in the valleys of the spectral sensitivity characteristics of the RGB pixels. A new linear matrix based on the EGY-RGB signal was developed. Using this simple matrix, a highly accurate color processing with a large margin to the sensitivity fluctuation and noise has been achieved.


asia and south pacific design automation conference | 2010

Checkered white-RGB color LOFIC CMOS image sensor

Shun Kawada; Shin Sakai; Yoshiaki Tashiro; Shigetoshi Sugawa

We succeeded in developing a checkered White-RGB color CMOS image sensor based on a lateral overflow integration capacitor (LOFIC) architecture. The LOFIC CMOS image sensor with a 1/3.3-inch optical format, 1280<sup>H</sup> × 480<sup>V</sup> pixels, 4.2-µm effective pixel pitch along with 45° direction was designed and fabricated through 0.18-µm 2-Poly 3-Metal CMOS technology with buried pinned photodiode (PD) process. The image sensor has achieved about 108-µV/ē high conversion gain and about 102-dB dynamic range (DR) performance in one exposure.

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