Soshi Sato

10 nmf perpendicular-anisotropy CoFeB-MgO magnetic tunnel junction with over 400°C high thermal tolerance by boron diffusion control

We have developed a perpendicular-anisotropy magnetic tunnel junction (p-MTJ) stack with CoFeB free layer and Co/Pt multilayer based synthetic ferrimagnetic (SyF) pinned layer that withstand annealing at a temperature up to 420°C (that compatible with CMOS BEOL process) by controlling boron diffusion. We demonstrated the 10 nmφ p-MTJ with double CoFeB/MgO interface tolerable against 400°C annealing which is a requisite building block for realization of high density spin transfer torque magnetic random access memory (STT-MRAM) in reduced dimensions.

Growth of Low Basal Plane Dislocation Density 4H-SiC Crystals in Controlled Temperature Distribution inside the Crucible

For bulk growth of SiC crystal with higher quality, it is important to control the temperature distribution inside the crucible. We have performed numerical calculations of the temperature distribution inside the growing crystal, and discussed the relationship between the calculated sheer stress and the basal plane dislocation densities. We found that growth with lower basal plane dislocation defect densities, specifically at the front edge of the crystal, is possible by lowering the temperature gradient toward the growth direction.

Improvement of Thermal Tolerance of CoFeB–MgO Perpendicular-Anisotropy Magnetic Tunnel Junctions by Controlling Boron Composition

We investigated annealing temperature Ta dependence of tunnel magnetoresistance (TMR) ratio and magnetic properties for perpendicular-anisotropy (CoFe)100-XBX/MgO magnetic tunnel junctions (MTJs) with single (CoFe)100-XBX/MgO interface (s-MTJ) and double CoFeB-MgO interface (d-MTJ) structures with various boron compositions X. High TMR ratio over 100% was observed in the s-MTJ with X= 35 at.% after annealing at 360°C-400°C, whereas the s-MTJ with X = 30 at.% showed the degradation of TMR ratio with the increase of Ta above 360°C, resulting from the decrease of perpendicular anisotropy. The d-MTJ with X = 25 at.% maintained high TMR ratio up to Ta = 400°C owing to its higher perpendicular anisotropy compared with the s-MTJ. The difference of perpendicular anisotropy between the s-MTJ and the d-MTJ can be attributed to higher interfacial anisotropy together with lower saturation magnetization of the d-MTJs. The lower saturation magnetization is attributable to two MgO layers that suppress boron diffusion from CoFeB layers, which was verified by cross-sectional line analysis using electron energy-loss spectroscopy.

1T1MTJ STT-MRAM Cell Array Design with an Adaptive Reference Voltage Generator for Improving Device Variation Tolerance

A device-variation-tolerant spin-transfer-torque magnetic random access memory (STT-MRAM) cell array design with a high-signal-margin reference generator circuit was developed to create high-density 1T1MTJ STT-MRAMs. To realize an appropriate STT-MRAM design, fluctuations in the memory cell characteristics were first measured using a 1-kbit STT-MRAM test chip. Based on these measurements, a reference generator and an STT-MRAM cell array architecture were proposed. This cell array was evaluated in terms of the signal margin for read operation and its tolerance to device variation by means of Monte-Carlo SPICE circuit simulations. The proposed design enables a 50% improvement in the signal margin compared with the conventional cell array circuit.

Evidence of a reduction reaction of oxidized iron/cobalt by boron atoms diffused toward naturally oxidized surface of CoFeB layer during annealing

We have investigated the redox reaction on the surface of Ta/CoFeB/MgO/CoFeB magnetic tunnel junction stack samples after annealing at 300, 350, and 400u2009°C for 1u2009h using angle-resolved X-ray photoelectron spectroscopy for precise analysis of the chemical bonding states. At a capping tantalum layer thickness of 1u2009nm, both the capping tantalum layer and the surface of the underneath CoFeB layer in the as-deposited stack sample were naturally oxidized. By comparison of the Co 2p and Fe 2p spectra among the as-deposited and annealed samples, reduction of the naturally oxidized cobalt and iron atoms occurred on the surface of the CoFeB layer. The reduction reaction was more significant at higher annealing temperature. Oxidized cobalt and iron were reduced by boron atoms that diffused toward the surface of the top CoFeB layer. A single CoFeB layer was prepared on SiO2, and a confirmatory evidence of the redox reaction with boron diffusion was obtained by angle-resolved X-ray photoelectron spectroscopy analysis of the naturally oxidized surface of the CoFeB single layer after annealing. The redox reaction is theoretically reasonable based on the Ellingham diagram.

Multiple breakdown model of carpet-bombing-like concaves formed during dielectric breakdown of silicon carbide metal–oxide–semiconductor capacitors

We observed characteristic carpet-bombing-like concaves after time-to-zero dielectric breakdown (TZDB) and time-dependent dielectric breakdown (TDDB) measurement for silicon carbide metal–oxide–semiconductor capacitors with a thermally grown oxide. A multiple breakdown model is proposed to explain the formation mechanism of the carpet-bombing-like concaves in TZDB measurement. Results and analysis of our TDDB measurements consistently support our multiple breakdown model.

Demonstration of Yield Improvement for On-Via MTJ Using a 2-Mbit 1T-1MTJ STT-MRAM Test Chip

To realize a high-density spin-transfer-torque magnetic random access memory (STT-MRAM) device comparable with a current dynamic random access memory (DRAM) device, it is a key to develop a new technology for memory cell size reduction. We have already reported a chemical- mechanical-polishing(CMP)-based preparation technology for magnetic tunnel junctions (MTJs) above the via holes that can drastically reduce memory cell area. In this paper, we first introduce the MTJ preparation technology to the mega-bit class STT-MRAM test chip, and demonstrate the improvement of memory-cell operation yield.

Effect of series resistance on dielectric breakdown phenomenon of silicon carbide MOS capacitor

An effect of the time constant of the measurement setup on a breakdown behavior of SiC MOS capacitors with aluminum gate electrode was investigated. For this experiment, an additional series resistance was inserted into the TDDB and TZDB measurement system. With respect to TDDB, SBD occurred more frequently when the additional series resistance was inserted. It is speculated that the joule heat generated at the moment of breakdown was not sufficient to form a low resistance conduction path between the gate electrode and substrate. With respect to TZDB, a sequential formation of separated groups of concaves was observed when the additional series resistance was inserted. It is speculated that the post-breakdown resistance was high enough to cause “self-healing” as observed in the TDDB measurement. These results highlight the generation and dissipation of the heat at the time of the breakdown is one of the causes that determine HBD or SBD of SiC MOS capacitors.

Formation mechanism of concave by dielectric breakdown on silicon carbide metal-oxide-semiconductor capacitor

Abstract Adjacent concaves are formed commonly on silicon carbide (SiC) MOS capacitor after time-dependent dielectric breakdown (TDDB). This paper describes the formation mechanism of the concave on the SiC MOS capacitor with aluminum gate electrode on thermally grown silicon dioxide gate dielectric by the dielectric breakdown. At the bottom of an approximately 450xa0nm-deep concave, a stack structure of the concave surface was found to be surface oxide/C-rich layer/Si-rich layer/SiC substrate. Some C-rich debris adhered on the surface of the concave. The concave surface was speculated to be formed by a sequence of the C-rich surface on the Si-rich surface, the debris adhered on the surface, and the oxide layer containing nitrogen and aluminum. Formation of the concave and its surface is explained based on the physical properties of SiC; (i) a peritectic decomposition of SiC to the solid phase carbon and the liquid phase solution containing silicon and carbon, (ii) a normal freezing process of the liquid phase solution, and (iii) a thermal decomposition on the concave surface to form a graphite layer.

Study on initial current leakage spots in CoFeB-capped MgO tunnel barrier by conductive atomic force microscopy

Although a microscopic study on a MgO tunnel barrier by atomic force microscopy has been required to study the reliability of magnetic tunnel junctions, the deterioration of bare MgO due to the adsorption of H2O and CO2 has been a problem. For an accurate evaluation of the initial current leakage spots distributed in a MgO tunnel barrier, a CoFeB-capped MgO tunnel barrier structure is proposed for evaluation by means of conductive atomic force microscopy. The CoFeB capping layer thickness was optimized to be 2.0 nm to prevent H2O and CO2 adsorption on the MgO and to minimize the series resistance due to the capping layer. The initial current leakage spot density of the MgO tunnel barrier with the optimized CoFeB capping layer exponentially increased as the thickness of the MgO tunnel barrier decreased from 1.6 to 0.8 nm, and was 157 spots/µm2 at the MgO thickness of 1.2 nm and the bias voltage of 0.5 V.